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TPS62826ADMQR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, VSON-6(1.5x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS62826ADMQR
Texas Instruments · DC-DC Converters · VSON-6(1.5x1.5)
TPS62826ADMQR from Texas Instruments, in a VSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Device enable pin: it must be pulled high to enable the device, pulling it low disables the device, and it must not be left floating. |
| 2 | PG | output | Power-good open-drain output; the pullup resistor can be connected to voltages up to 5.5V, and the pin may be left floating if unused. |
| 3 | FB | input | Feedback pin; for the fixed output voltage versions this pin must be connected to the output. |
| 4 | GND | power_in | Ground pin. |
| 5 | SW | power_out | Switch pin of the power stage. |
| 6 | VIN | power_in | Input voltage pin; the input voltage range for the TPS62826x is 2.4V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSON-6(1.5x1.5) |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Quiescent current | IQ | 8 | mA | EN = High, no load, FPWM devices | 5 | ||
| Quiescent current | IQ | 4 | 10 | µA | EN = High, no load, device not switching | 5 | |
| Shutdown current | ISD | 0.05 | 0.5 | µA | EN = Low, TJ = -40 ℃ to 85 ℃ | 5 | |
| Under voltage lock out threshold | VUVLO | 2.1 | 2.2 | 2.3 | V | VIN falling | 5 |
| Under voltage lock out hysteresis | 160 | mV | VIN rising | 5 | |||
| Thermal shutdown threshold | TJSD | 150 | °C | TJ rising | 5 | ||
| Thermal shutdown hysteresis | 20 | °C | TJ falling | 5 | |||
| High-level threshold voltage | VIH | 1 | V | 5 | |||
| Low-level threshold voltage | VIL | 0.4 | V | 5 | |||
| Input leakage current into EN pin | IEN,LKG | 0.01 | 0.1 | µA | EN = High | 5 | |
| Soft start time | tSS | 1.25 | ms | Time from EN high to 95% of VOUT nominal, TPS62824x/5x/6x/7A | 5 | ||
| Power good lower threshold | VPG | 94 | 96 | 98 | % | VPG rising, VFB referenced to VFB nominal | 5 |
| Power good lower threshold | VPG | 90 | 92 | 94 | % | VPG falling, VFB referenced to VFB nominal | 5 |
| Power good upper threshold | VPG | 108 | 110 | 112 | % | VPG rising, VFB referenced to VFB nominal | 5 |
| Power good upper threshold | VPG | 103 | 105 | 107 | % | VPG falling, VFB referenced to VFB nominal | 5 |
| Low-level output voltage | VPG,OL | 0.4 | V | Isink = 1 mA | 5 | ||
| Input leakage current into PG pin | IPG,LKG | 0.01 | 0.1 | µA | VPG = 5.0 V | 5 | |
| Power good deglitch delay | tPG,DLY | 100 | µs | PG rising edge | 5 | ||
| Power good deglitch delay | tPG,DLY | 20 | µs | PG falling edge | 5 | ||
| Feedback regulation voltage | VFB | 594 | 600 | 606 | mV | PWM mode | 5 |
| Feedback input leakage current for adjustable output voltage | IFB,LKG | 0.01 | 0.05 | µA | VFB = 0.6 V | 5 | |
| Output discharge current | IDIS | 75 | 400 | mA | VSW = 0.4V; EN = LOW | 5 | |
| Load regulation | 0.1 | %/A | IOUT = 0.5 A to 3 A, VOUT = 1.8 V | 5 | |||
| High-side FET on-resistance | RDS(on) | 26 | mΩ | 5 | |||
| Low-side FET on-resistance | RDS(on) | 25 | mΩ | 5 | |||
| High-side FET switch current limit | ILIM | 3.7 | 4.3 | 5 | A | DC, TPS62826x | 6 |
| Low-side FET negative current limit | ILIM | -1.6 | A | DC, TPS62824A/5A/6A/7A | 6 | ||
| Input voltage range | VIN | 2.4 | 5.5 | V | TPS62824x, TPS62825x and TPS62826x | 4 | |
| Output voltage range | VOUT | 0.6 | 4 | V | 4 | ||
| Output current range | IOUT | 0 | 3 | A | TPS62826x | 4 | |
| Sink current at PG pin | ISINK_PG | 1 | mA | 4 | |||
| Pull-up resistor voltage | VPG | 5.5 | V | 4 | |||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Voltage at pins VIN, FB, EN, PG | VIN, FB, EN, PG | -0.3 | 6 | V | 4 | ||
| SW voltage AC, less than 10 ns | SW | -2.5 | 10 | V | While switching | 4 | |
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Electrostatic discharge, human-body model | V(ESD) | -2000 | 2000 | V | HBM, per ANSI/ESDA/JEDEC JS-001 | 4 | |
| Electrostatic discharge, charged-device model | V(ESD) | -500 | 500 | V | CDM, per JEDEC JESD22-C101 | 4 | |
| Junction-to-ambient thermal resistance | RθJA | 129.5 | °C/W | JEDEC 6-pin | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 103.9 | °C/W | JEDEC 6-pin | 4 | ||
| Junction-to-board thermal resistance | RθJB | 33.1 | °C/W | JEDEC 6-pin | 4 | ||
| Junction-to-top characterization parameter | ψJT | 3.8 | °C/W | JEDEC 6-pin | 4 | ||
| Junction-to-board characterization parameter | ψJB | 33.1 | °C/W | JEDEC 6-pin | 5 |
CAD (KiCad official)
- Symbol:
TPS62826ADMQR - Footprint:
Package_SON:WSON-6_1.5x1.5mm_P0.5mm - 3D model: VSON-6(1.5x1.5) (KiCad packages3D, STEP)
- 3D model files:
tps62826admqr-etched.step/tps62826admqr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps62826admqr.step/tps62826admqr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (35 pp, sha256
8a309f2a40486a38, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).