component
TPS62745DSSR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, WSON-12-EP(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS62745DSSR
Texas Instruments · DC-DC Converters · WSON-12-EP(2x3)
TPS62745DSSR from Texas Instruments, in a WSON-12-EP(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power supply input (3.3V to 10V range); requires 4.7µF ceramic capacitor connection to GND for proper operation. |
| 2 | SW | output | Switching output connected to internal MOSFET switches; connect inductor to this terminal. |
| 3 | GND | power_in | Ground pin; connect close to input and output capacitor ground terminals. |
| 4 | EN_VIN_SW | input | Enable control for internal VIN-to-VIN_SW switch; high connects switch, low disconnects; tie to GND if not used. |
| 5 | VOUT | input | Voltage feedback input for regulation loop with internal 50MΩ divider and discharge circuit; connect directly to output capacitor with short trace. |
| 6 | VIN_SW | output | Switch output providing VIN connection when EN_VIN_SW is high (maximum 5mA current, 85-160Ω on-resistance); leave open if not used. |
| 7 | PG | tri_state | Open-drain power good output; indicates output voltage regulation status with 95% upper and 92% lower thresholds. |
| 8 | VSEL4 | input | Output voltage selection MSB (bit 3); part of 4-bit VSEL[4:1] code for setting VOUT from 1.8V to 3.3V in 100mV steps; must be terminated. |
| 9 | VSEL3 | input | Output voltage selection bit 2; part of 4-bit VSEL[4:1] code for setting VOUT from 1.8V to 3.3V in 100mV steps; must be terminated. |
| 10 | VSEL2 | input | Output voltage selection bit 1; part of 4-bit VSEL[4:1] code for setting VOUT from 1.8V to 3.3V in 100mV steps; must be terminated. |
| 11 | VSEL1 | input | Output voltage selection LSB (bit 0); part of 4-bit VSEL[4:1] code for setting VOUT from 1.8V to 3.3V in 100mV steps per Table 1; must be terminated. |
| 12 | EN | input | Enable input; high level enables device operation with typical 400nA quiescent current, low level enters shutdown mode with typical 130nA; must be terminated. |
| 13 | EXPOSED THERMAL PAD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-12-EP(2x3) |
| Category | Power Management (PMIC) |
| Pins | 13 |
CAD (KiCad official)
- Symbol:
TPS62745DSSR - Footprint:
Package_SON:WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65 - 3D model: WSON-12-EP(2x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps62745dssr-etched.step/tps62745dssr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps62745dssr.step/tps62745dssr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
487761ca108753bb, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).