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Contents

README

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TPS62260DDCT

Texas Instruments · DC-DC Converters · TSOT-23-5

TPS62260DDCT from Texas Instruments, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in VIN power supply pin.
2 GND power_in GND supply pin.
3 EN input Enable pin: pulling low forces the device into shutdown mode, pulling high enables the device; this pin must be terminated.
4 FB input Feedback pin for the internal regulation loop; connect the external resistor divider to this pin (for fixed output voltage options, connect directly to the output capacitor).
5 SW output Switch pin connected to the internal MOSFET switches; connect the external inductor between this terminal and the output capacitor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSOT-23-5
Category Power Supply Chip
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VIN 2.3 6 V 5
Output current IOUT 600 mA VIN 2.5 V to 6 V 5
Output current IOUT 300 mA VIN 2.3 V to 2.5 V 5
Output current IOUT 150 mA VIN 2 V to 2.3 V 5
Shutdown current ISD 0.1 1 μA EN = GND 5
Undervoltage lockout threshold falling UVLO 1.85 V Falling 5
Undervoltage lockout threshold rising UVLO 1.95 V Rising 5
High level input voltage, EN, MODE VIH 1 V 2 V ≤ VIN ≤ 6 V 5
Low level input voltage, EN, MODE VIL 0 0.4 V 2 V ≤ VIN ≤ 6 V 5
Input bias current, EN, MODE IIN 0.01 1 μA EN, MODE = GND or VIN 5
High side MOSFET on-resistance RDS(on) 240 480 mΩ VIN = VGS = 3.6 V, TA = 25°C 5
Low side MOSFET on-resistance RDS(on) 185 380 mΩ VIN = VGS = 3.6 V, TA = 25°C 5
Forward current limit MOSFET high side and low side ILIMF 0.8 1 1.2 A VIN = VGS = 3.6 V 5
Oscillator frequency fSW 2 2.25 2.5 MHz 2 V ≤ VIN ≤ 6 V 5
Adjustable output voltage range VOUT 0.6 6 V Max is VIN 5
Feedback voltage PWM mode VFB -1.5 0 1.5 % MODE = VIN, PWM operation, VFB = VOUT, 2.5 V ≤ VIN ≤ 6 V, 0 mA ≤ IOUT ≤ 600 mA 5
Leakage current into SW pin Ilkg 0.1 1 μA VIN = 3.6 V, VIN = VOUT = VSW, EN = GND 5
Operating quiescent current, PFM not switching IQ 15 μA IOUT = 0 mA, PFM mode enabled (MODE = GND) device not switching 5
Operating quiescent current, PFM switching IQ 18.5 μA IOUT = 0 mA, MODE = GND, device switching, VOUT = 1.8 V 5
Operating quiescent current, PWM IQ 3.8 mA IOUT = 0 mA, MODE = VIN, PWM operation, VOUT = 1.8 V, VIN = 3 V 5
Thermal shutdown TSD 140 °C Increasing junction temperature 5
Thermal shutdown hysteresis TSD 20 °C Decreasing junction temperature 5
Reference voltage VREF 600 mV 5
Load regulation PWM mode -0.5 %/A 5
Start-up time tStart Up 500 μs Time from active EN to reach 95% of VOUT nominal 5
VOUT ramp-up time tRamp 250 μs Time to ramp from 5% to 95% of VOUT 5
Input voltage VIN -0.3 7 V 4
Voltage at EN, MODE -0.3 7 V VIN +0.3 ≤ 7 4
Voltage on SW -0.3 7 V 4
Maximum operating junction temperature TJ -40 125 °C 4
Storage temperature Tstg -65 150 °C 4
ESD HBM V(ESD) -2000 2000 V Human body model, all pins 4
ESD CDM V(ESD) -1000 1000 V Charged device model, all pins 4
Supply voltage VIN 2 6 V 4
Output voltage range for adjustable voltage 0.6 6 V Max is VIN 4
Operating ambient temperature TA -40 85 °C 4
Operating junction temperature TJ -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 226.9 °C/W DDC [SOT] 5 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 40.7 °C/W DDC [SOT] 5 pins 4
Junction-to-board thermal resistance RθJB 48.8 °C/W DDC [SOT] 5 pins 4
Junction-to-top characterization parameter ψJT 0.5 °C/W DDC [SOT] 5 pins 4
Junction-to-board characterization parameter ψJB 48.1 °C/W DDC [SOT] 5 pins 4

CAD (KiCad official)

  • Symbol: TPS62260DDCT
  • Footprint: Package_TO_SOT_SMD:TSOT-23-5
  • 3D model: TSOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps62260ddct-etched.step / tps62260ddct-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62260ddct.step / tps62260ddct.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (35 pp, sha256 997d80438f1f04ee, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF