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TPS62250DRVR

Texas Instruments · DC-DC Converters · WSON-6-EP(2x2)

TPS62250DRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch pin connected to the internal MOSFET switches; connect the external inductor between this terminal and the output capacitor. Absolute maximum voltage on SW is -0.3 V to 7 V.
2 MODE input Available only in the SON package: MODE high forces fixed-frequency PWM operation, and MODE low enables Power Save Mode with automatic transition from PFM to PWM. EN and MODE are rated -0.3 V to VIN + 0.3 V, with a maximum of 7 V.
3 FB input Feedback pin for the internal regulation loop; connect the external resistor divider here, or connect it directly to the output capacitor for the fixed-output version. The reference voltage Vref is 600 mV.
4 EN input Enable pin: pulling it low forces shutdown mode and pulling it high enables the device; it must be terminated. EN is rated -0.3 V to VIN + 0.3 V, with a maximum of 7 V, and is valid for 2 V ≤ VIN ≤ 6 V with VIH of 1 V minimum and VIL of 0.4 V maximum.
5 VIN power_in Input supply pin; the recommended supply range is 2 V to 6 V and the absolute maximum input voltage is 7 V.
6 GND power_in Ground supply pin; the datasheet says to connect it to the PowerPAD land and use that pad as the star point for power ground.
7 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6-EP(2x2)
Category Power Management (PMIC)
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range (absolute maximum) VIN -0.3 7 V 2
Voltage range on SW (absolute maximum) VSW -0.3 7 V 2
Voltage range at EN, MODE (absolute maximum) VEN, VMODE -0.3 V VIN + 0.3, ≤ 7 V 2
ESD rating, human body model HBM 2 kV Human body model 2
ESD rating, charge device model CDM 1 kV Charge device model 2
ESD rating, machine model MM 200 V Machine model 2
Maximum operating junction temperature TJ -40 125 °C 2
Storage temperature range Tstg -65 150 °C 2
Supply voltage VIN 2 6 V 2
Operating ambient temperature TA -40 85 °C 2
Operating junction temperature TJ -40 125 °C 2
Input voltage range VIN 2.3 6 V 3
Operating quiescent current, device switching IQ 18.5 µA IOUT = 0 mA, PFM mode enabled (MODE = GND), device switching, VOUT = 1.8 V 3
Operating quiescent current, PWM operation IQ 3.8 mA IOUT = 0 mA, switching with no load (MODE = VIN), PWM operation, VOUT = 1.8 V, VIN = 3 V 3
Shutdown current ISD 0.1 1 µA EN = GND 3
Low level input voltage, EN, MODE VIL 0 0.4 V 2 V ≤ VIN ≤ 6 V 3
High level input voltage, EN, MODE VIH 1 V 2 V ≤ VIN ≤ 6 V; max printed as VIN 3
Input bias current, EN, MODE IIN 0.01 1 µA EN, MODE = GND or VIN 3
High side MOSFET on-resistance RDS(on) 240 480 mΩ VIN = VGS = 3.6 V, TA = 25°C 3
Low side MOSFET on-resistance RDS(on) 185 380 mΩ VIN = VGS = 3.6 V, TA = 25°C 3
Forward current limit MOSFET, high-side and low side ILIMF 0.8 1 1.2 A VIN = VGS = 3.6 V 3
Oscillator frequency fSW 2 2.25 2.5 MHz 2 V ≤ VIN ≤ 6 V 3
Feedback voltage, PWM mode (fixed output voltage versions) VFB -1.5 0 1.5 % MODE = VIN, PWM operation, for fixed output voltage versions, 2.5 V ≤ VIN ≤ 6 V, 0 mA ≤ IOUT ≤ 600 mA 3
Undervoltage lockout threshold, falling UVLO 1.85 V Falling 3
Undervoltage lockout threshold, rising UVLO 1.95 V Rising 3
Thermal shutdown TSD 140 °C Increasing junction temperature 3
Thermal shutdown hysteresis TSD 20 °C Decreasing junction temperature 3
Reference voltage Vref 600 mV 3
Feedback voltage, PFM mode VFB 1 % MODE = GND, device in PFM mode, voltage positioning active 3
Load regulation, PWM mode -0.5 %/A PWM Mode 3
Start-up time tStart Up 500 µs Time from active EN to reach 95% of VOUT nominal 3
VOUT ramp up time tRamp 250 µs Time to ramp from 5% to 95% of VOUT 3
Leakage current into SW pin Ilkg 0.1 1 µA VIN = 3.6 V, VIN = VOUT = VSW, EN = GND 3
Junction-to-ambient thermal resistance, DRV package RθJA 76 °C/W DRV package 2

CAD (KiCad official)

  • Symbol: TPS62250DRVR
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: tps62250drvr-etched.step / tps62250drvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62250drvr.step / tps62250drvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 79c5c48f91e1e991, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF