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TPS62160QDSGTQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, WSON-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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tps62160qdsgtq1: specified limits as data (metadata.characteristics, 33 rows from the datasheet)
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TPS62160QDSGTQ1
Texas Instruments · DC-DC Converters · WSON-8-EP(2x2)
TPS62160QDSGTQ1 from Texas Instruments, in a WSON-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGND | power_in | Power ground pin for the power stage of the converter. |
| 2 | VIN | power_in | Supply voltage input with a recommended operating range of 3 V to 17 V and an absolute maximum of 20 V. |
| 3 | EN | input | Enable input where high enables the device and low disables it; the pin voltage is limited to -0.3 V to VIN+0.3 V. |
| 4 | AGND | power_in | Analog ground pin, which must also be connected to the exposed thermal pad. |
| 5 | FB | input | Voltage feedback input for the adjustable version, connected to a resistive divider; it is recommended to connect FB to AGND on fixed-output versions for improved thermal performance, with an absolute voltage range of -0.3 V to 7 V. |
| 6 | VOS | input | Output voltage sense pin and connection for the control loop circuitry, with an absolute voltage range of -0.3 V to 7 V. |
| 7 | SW | output | Switch node connected to the internal MOSFET switches, where the inductor is connected between SW and the output capacitor; the pin voltage is limited to -0.3 V to VIN+0.3 V. |
| 8 | PG | output | Open-drain power-good output that is high when VOUT is ready and low when VOUT is below nominal regulation, requires a pull-up resistor, goes high impedance when the device is switched off, and has a maximum sink current of 10 mA. |
| 9 | Exposed Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-8-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN supply voltage (absolute maximum) | VIN | -0.3 | 20 | V | 4 | ||
| Pin voltage range EN, SW | -0.3 | V | 4 | ||||
| Pin voltage range FB, PG, VOS | -0.3 | 7 | V | 4 | |||
| Power Good sink current | 10 | mA | 4 | ||||
| Operating junction temperature range | TJ | -40 | 125 | °C | 4 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VIN | 3 | 17 | V | 4 | ||
| Output voltage range | VOUT | 0.9 | 6 | V | 4 | ||
| Operating junction temperature range | TJ | -40 | 125 | °C | 4 | ||
| Input voltage range | VIN | 3 | 17 | V | 5 | ||
| Operating quiescent current | IQ | 17 | 30 | µA | EN = High, IOUT = 0 mA, Device not switching | 5 | |
| Shutdown current | ISD | 1.8 | 25 | µA | EN = Low | 5 | |
| Undervoltage lockout threshold (falling input voltage) | VUVLO | 2.6 | 2.7 | 2.82 | V | Falling input voltage | 5 |
| High level input threshold voltage (EN) | VEN_H | 0.9 | V | 5 | |||
| Low level input threshold voltage (EN) | VEN_L | 0.3 | V | 5 | |||
| Input leakage current (EN) | ILKG_EN | 0.01 | 1 | µA | EN = VIN or GND | 5 | |
| Power Good threshold voltage, rising | VTH_PG | 92 | 95 | 98 | % | Rising (%VOUT) | 5 |
| Power Good threshold voltage, falling | VTH_PG | 87 | 90 | 93 | % | Falling (%VOUT) | 5 |
| Power Good output low | VOL_PG | 0.07 | 0.3 | V | IPG = –2 mA | 5 | |
| Input leakage current (PG) | ILKG_PG | 1 | 400 | nA | VPG = 1.8 V | 5 | |
| High-side MOSFET ON-resistance | RDS(ON) | 300 | 600 | mΩ | VIN ≥ 6 V | 5 | |
| Low-side MOSFET ON-resistance | RDS(ON) | 120 | 200 | mΩ | VIN ≥ 6 V | 5 | |
| High-side MOSFET forward current limit | ILIMF | 1.45 | 1.95 | 2.45 | A | VIN = 12 V, TA = 25°C | 5 |
| Pin leakage current (FB) | ILKG_FB | 5 | 400 | nA | VFB = 1.2 V | 5 | |
| Output voltage range | VOUT | 0.9 | 6 | V | VIN ≥ VOUT | 5 | |
| Feedback voltage accuracy (PWM mode) | -3 | 3 | % | PWM Mode operation, VIN ≥ VOUT + 1 V | 5 | ||
| Feedback voltage accuracy (Power Save Mode) | -3 | 4 | % VOUT | Power Save Mode operation, COUT = 2x22 µF | 5 | ||
| Junction-to-ambient thermal resistance (DSG 8-pin) | RθJA | 61.8 | °C/W | 4 | |||
| Junction-to-case (top) thermal resistance (DSG 8-pin) | RθJC(top) | 61.3 | °C/W | 4 | |||
| Junction-to-board thermal resistance (DSG 8-pin) | RθJB | 15.5 | °C/W | 4 | |||
| Junction-to-top characterization parameter (DSG 8-pin) | ψJT | 0.4 | °C/W | 4 | |||
| Junction-to-board characterization parameter (DSG 8-pin) | ψJB | 15.4 | °C/W | 4 | |||
| Junction-to-case (bottom) thermal resistance (DSG 8-pin) | RθJC(bot) | 8.6 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
TPS62160QDSGTQ1 - Footprint:
Package_SON:WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm - 3D model: WSON-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps62160qdsgtq1-etched.step/tps62160qdsgtq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps62160qdsgtq1.step/tps62160qdsgtq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
8426ddbeb039e891, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS62160QDSGTQ1
**Texas Instruments** · DC-DC Converters · WSON-8-EP(2x2)
TPS62160QDSGTQ1 from Texas Instruments, in a WSON-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGND | power_in | Power ground pin for the power stage of the converter. |
| 2 | VIN | power_in | Supply voltage input with a recommended operating range of 3 V to 17 V and an absolute maximum of 20 V. |
| 3 | EN | input | Enable input where high enables the device and low disables it; the pin voltage is limited to -0.3 V to VIN+0.3 V. |
| 4 | AGND | power_in | Analog ground pin, which must also be connected to the exposed thermal pad. |
| 5 | FB | input | Voltage feedback input for the adjustable version, connected to a resistive divider; it is recommended to connect FB to AGND on fixed-output versions for improved thermal performance, with an absolute voltage range of -0.3 V to 7 V. |
| 6 | VOS | input | Output voltage sense pin and connection for the control loop circuitry, with an absolute voltage range of -0.3 V to 7 V. |
| 7 | SW | output | Switch node connected to the internal MOSFET switches, where the inductor is connected between SW and the output capacitor; the pin voltage is limited to -0.3 V to VIN+0.3 V. |
| 8 | PG | output | Open-drain power-good output that is high when VOUT is ready and low when VOUT is below nominal regulation, requires a pull-up resistor, goes high impedance when the device is switched off, and has a maximum sink current of 10 mA. |
| 9 | Exposed Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-8-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN supply voltage (absolute maximum) | VIN | -0.3 | | 20 | V | | 4 |
| Pin voltage range EN, SW | | -0.3 | | | V | | 4 |
| Pin voltage range FB, PG, VOS | | -0.3 | | 7 | V | | 4 |
| Power Good sink current | | | | 10 | mA | | 4 |
| Operating junction temperature range | TJ | -40 | | 125 | °C | | 4 |
| Storage temperature range | Tstg | -65 | | 150 | °C | | 4 |
| Supply voltage | VIN | 3 | | 17 | V | | 4 |
| Output voltage range | VOUT | 0.9 | | 6 | V | | 4 |
| Operating junction temperature range | TJ | -40 | | 125 | °C | | 4 |
| Input voltage range | VIN | 3 | | 17 | V | | 5 |
| Operating quiescent current | IQ | | 17 | 30 | µA | EN = High, IOUT = 0 mA, Device not switching | 5 |
| Shutdown current | ISD | | 1.8 | 25 | µA | EN = Low | 5 |
| Undervoltage lockout threshold (falling input voltage) | VUVLO | 2.6 | 2.7 | 2.82 | V | Falling input voltage | 5 |
| High level input threshold voltage (EN) | VEN_H | 0.9 | | | V | | 5 |
| Low level input threshold voltage (EN) | VEN_L | | | 0.3 | V | | 5 |
| Input leakage current (EN) | ILKG_EN | | 0.01 | 1 | µA | EN = VIN or GND | 5 |
| Power Good threshold voltage, rising | VTH_PG | 92 | 95 | 98 | % | Rising (%VOUT) | 5 |
| Power Good threshold voltage, falling | VTH_PG | 87 | 90 | 93 | % | Falling (%VOUT) | 5 |
| Power Good output low | VOL_PG | | 0.07 | 0.3 | V | IPG = –2 mA | 5 |
| Input leakage current (PG) | ILKG_PG | | 1 | 400 | nA | VPG = 1.8 V | 5 |
| High-side MOSFET ON-resistance | RDS(ON) | | 300 | 600 | mΩ | VIN ≥ 6 V | 5 |
| Low-side MOSFET ON-resistance | RDS(ON) | | 120 | 200 | mΩ | VIN ≥ 6 V | 5 |
| High-side MOSFET forward current limit | ILIMF | 1.45 | 1.95 | 2.45 | A | VIN = 12 V, TA = 25°C | 5 |
| Pin leakage current (FB) | ILKG_FB | | 5 | 400 | nA | VFB = 1.2 V | 5 |
| Output voltage range | VOUT | 0.9 | | 6 | V | VIN ≥ VOUT | 5 |
| Feedback voltage accuracy (PWM mode) | | -3 | | 3 | % | PWM Mode operation, VIN ≥ VOUT + 1 V | 5 |
| Feedback voltage accuracy (Power Save Mode) | | -3 | | 4 | % VOUT | Power Save Mode operation, COUT = 2x22 µF | 5 |
| Junction-to-ambient thermal resistance (DSG 8-pin) | RθJA | | 61.8 | | °C/W | | 4 |
| Junction-to-case (top) thermal resistance (DSG 8-pin) | RθJC(top) | | 61.3 | | °C/W | | 4 |
| Junction-to-board thermal resistance (DSG 8-pin) | RθJB | | 15.5 | | °C/W | | 4 |
| Junction-to-top characterization parameter (DSG 8-pin) | ψJT | | 0.4 | | °C/W | | 4 |
| Junction-to-board characterization parameter (DSG 8-pin) | ψJB | | 15.4 | | °C/W | | 4 |
| Junction-to-case (bottom) thermal resistance (DSG 8-pin) | RθJC(bot) | | 8.6 | | °C/W | | 4 |
## CAD (KiCad official)
- Symbol: `TPS62160QDSGTQ1`
- Footprint: `Package_SON:WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm`
- 3D model: WSON-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files: `tps62160qdsgtq1-etched.step` / `tps62160qdsgtq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps62160qdsgtq1.step` / `tps62160qdsgtq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps62160-q1) (31 pp, sha256 `8426ddbeb039e891`, retrieved 2026-10-11, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps62160qdsgtq1-datasheet.pdf)