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Contents

README

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TPS62160DSGR

Texas Instruments · DC-DC Converters · WSON-8-EP(2x2)

TPS62160DSGR from Texas Instruments, in a WSON-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PGND power_in Power ground connection.
2 VIN power_in Supply voltage input (operating range 3V to 17V).
3 EN input Enable input; high level (≥0.6V) enables device operation, low level (≤0.3V) disables device.
4 AGND power_in Analog ground reference.
5 FB input Feedback voltage input regulated to 0.8V for adjustable output voltage programming via resistive divider.
6 VOS input Output voltage sense input connected to output capacitor for control loop feedback.
7 SW output Switch node connected to internal MOSFET switches; connect inductor between this pin and output capacitor.
8 PG tri_state Open-drain power good output; high impedance when VOUT ready (92-98% nominal), low when below nominal regulation; high impedance when device disabled; requires external pull-up resistor.
9 Exposed Thermal Pad power_in Exposed thermal pad electrically connected to AGND; must be soldered to board for proper thermal dissipation and mechanical reliability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-8-EP(2x2)
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VIN 3 17 V 6
Operating quiescent current IQ 17 30 µA EN = High, IOUT = 0 mA, device not switching 6
Operating quiescent current IQ 17 25 µA TJ = -40°C to +85°C 6
Shutdown current ISD 1.5 25 µA EN = Low 6
Shutdown current ISD 1.5 4 µA TJ = -40°C to +85°C 6
Undervoltage lockout threshold VUVLO 2.6 2.7 2.82 V Falling input voltage 6
Undervoltage lockout hysteresis VUVLO 180 mV 6
Thermal shutdown temperature TSD 160 °C Rising temperature 6
Thermal shutdown hysteresis TSD 20 °C Falling temperature 6
Input leakage current (EN) ILKG_EN 0.01 1 µA EN = VIN or GND 6
Power good threshold voltage, rising VTH_PG 92 95 98 %VOUT Rising (%VOUT) 6
Power good threshold voltage, falling VTH_PG 87 90 93 %VOUT Falling (%VOUT) 6
Power good output low voltage VOL_PG 0.07 0.3 V IPG = –2 mA 6
Input leakage current (PG) ILKG_PG 1 400 nA VPG = 1.8 V 6
High-side MOSFET ON-resistance RDS(ON) 300 600 mΩ VIN ≥ 6 V 6
High-side MOSFET ON-resistance RDS(ON) 430 mΩ VIN = 3 V 6
Low-side MOSFET ON-resistance RDS(ON) 120 200 mΩ VIN ≥ 6 V 6
Low-side MOSFET ON-resistance RDS(ON) 165 mΩ VIN = 3 V 6
High-side MOSFET forward current limit ILIMF 1.45 1.95 2.45 A VIN = 12 V, TJ = 25°C 6
Internal reference voltage VREF 0.8 V 6
Pin leakage current (FB) ILKG_FB 5 400 nA TPS62160, VFB = 1.2 V 6
Output voltage range (TPS62160) VOUT 0.9 6 V VIN ≥ VOUT 6
Initial output voltage accuracy -3 3 % PWM mode operation, VIN ≥ VOUT + 1 V 6
Initial output voltage accuracy (power save mode) -3.5 4 % Power save mode operation, COUT = 22 µF 6
DC output voltage load regulation 0.05 %/A VIN = 12 V, VOUT = 3.3 V, PWM mode operation 6
DC output voltage line regulation 0.02 %/V 3 V ≤ VIN ≤ 17 V, VOUT = 3.3 V, IOUT = 0.5 A, PWM mode operation 6
Supply voltage VIN VIN 3 17 V 5
Output voltage VOUT VOUT 0.9 6 V 5
Operating junction temperature TJ -40 125 °C 5
Pin voltage range VIN VIN -0.3 20 V 5
Pin voltage range EN, SW (DC) -0.3 V 5
Pin voltage range SW (AC) -2 24.5 V less than 10ns 5
Pin voltage range FB, PG, VOS -0.3 7 V 5
Power good sink current PG 10 mA 5
Operating junction temperature TJ -40 150 °C 5
Storage temperature Tstg -65 150 °C 5
Junction-to-ambient thermal resistance (DSG) RθJA 61.8 °C/W 5
Junction-to-case (top) thermal resistance (DSG) RθJC(top) 61.3 °C/W 5
Junction-to-board thermal resistance (DSG) RθJB 15.5 °C/W 5
Junction-to-top characterization parameter (DSG) ψJT 0.4 °C/W 5
Junction-to-board characterization parameter (DSG) ψJB 15.4 °C/W 5
Junction-to-case (bottom) thermal resistance (DSG) RθJC(bot) 8.6 °C/W 5

CAD (KiCad official)

  • Symbol: TPS62160DSGR
  • Footprint: Package_SON:WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm
  • 3D model: WSON-8-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: tps62160dsgr-etched.step / tps62160dsgr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62160dsgr.step / tps62160dsgr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 729fe659c0bb2b33, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF