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TPS62150AQRGTRQ1

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Texas Instruments DC-DC Converters, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS62150AQRGTRQ1

Texas Instruments · DC-DC Converters · VQFN-16-EP(3x3)

TPS62150AQRGTRQ1 from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch node connected to internal MOSFET switches; connect inductor between SW and output capacitor.
2 SW output Switch node connected to internal MOSFET switches; connect inductor between SW and output capacitor.
3 SW output Switch node connected to internal MOSFET switches; connect inductor between SW and output capacitor.
4 PG tri_state Output power good indicator with open-drain output (High = VOUT ready, Low = VOUT below nominal regulation; requires pull-up resistor).
5 FB input Voltage feedback input for adjustable version; connect resistive voltage divider to this pin for output voltage setting.
6 AGND power_in Analog ground; must be connected directly to exposed thermal pad and common ground plane.
7 FSW input Switching frequency select input with internal pull-down (Low = 2.5MHz, High = 1.25MHz for typical operation).
8 DEF input Output voltage scaling control input with internal pull-down (Low = nominal, High = nominal + 5%).
9 SS/TR input Soft-start and tracking input; external capacitor sets internal voltage reference rise time for tracking and sequencing.
10 AVIN power_in Analog supply voltage for control circuitry (3V to 17V); must connect to same source as PVIN.
11 PVIN power_in Supply voltage for power stage (3V to 17V); must connect to same source as AVIN.
12 PVIN power_in Supply voltage for power stage (3V to 17V); must connect to same source as AVIN.
13 EN input Enable control input with internal pull-down (High = enabled, Low = disabled).
14 VOS input Output voltage sense pin for control loop feedback connection.
15 PGND power_in Power ground; must be connected directly to exposed thermal pad and common ground plane.
16 PGND power_in Power ground; must be connected directly to exposed thermal pad and common ground plane.
17 Exposed Thermal Pad passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS62150AQRGTRQ1
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps62150aqrgtrq1-etched.step / tps62150aqrgtrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62150aqrgtrq1.step / tps62150aqrgtrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 e6f7e40302057bc1, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF