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Contents

README

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TPS62142RGTT

Texas Instruments · DC-DC Converters · QFN-16-EP(3x3)

TPS62142RGTT from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch node connected to internal MOSFET switches; connect inductor between SW and output capacitor.
2 SW output Switch node connected to internal MOSFET switches; connect inductor between SW and output capacitor.
3 SW output Switch node connected to internal MOSFET switches; connect inductor between SW and output capacitor.
4 PG tri_state Output power good indicator; high when VOUT ready, low when VOUT below nominal regulation; open-drain output requiring pull-up resistor.
5 FB input Voltage feedback input for adjustable version; recommended to connect to AGND on fixed output versions (TPS62142) for improved thermal performance.
6 AGND power_in Analog ground; must be connected directly to exposed thermal pad and common ground plane.
7 FSW input Switching frequency select input; low ≈ 2.5 MHz, high ≈ 1.25 MHz typical operation.
8 DEF input Output voltage scaling input; low = nominal voltage, high = nominal voltage + 5%.
9 SS/TR input Soft-start/tracking input; external capacitor sets internal voltage reference rise time for tracking and sequencing.
10 AVIN power_in Supply voltage input for control circuitry; must be connected to same source as PVIN.
11 PVIN power_in Supply voltage input for power stage; must be connected to same source as AVIN.
12 PVIN power_in Supply voltage input for power stage; must be connected to same source as AVIN.
13 EN input Enable input; high = device enabled, low = device disabled/shutdown.
14 VOS input Output voltage sense pin for control loop circuitry connection.
15 PGND power_in Power ground; must be connected directly to exposed thermal pad and common ground plane.
16 PGND power_in Power ground; must be connected directly to exposed thermal pad and common ground plane.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS62142RGTT
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps62142rgtt-etched.step / tps62142rgtt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62142rgtt.step / tps62142rgtt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 4bee4a4bd05d3236, retrieved 2026-09-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF