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Contents

README

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TPS62142RGTR

Texas Instruments · DC-DC Converters · VQFN-16-EP(3x3)

TPS62142RGTR from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch node driven by internal MOSFET switches; connect inductor between SW and output capacitor.
2 SW output Switch node driven by internal MOSFET switches; connect inductor between SW and output capacitor.
3 SW output Switch node driven by internal MOSFET switches; connect inductor between SW and output capacitor.
4 PG tri_state Open-drain power-good output (high-Z when VOUT ready, pulls low when VOUT below nominal regulation); requires external pullup resistor, max sink current 2 mA.
5 FB input Voltage feedback input for adjustable versions; connect to AGND on fixed-output TPS62142 for improved thermal performance.
6 AGND power_in Analog ground; must be connected directly to exposed thermal pad and common ground plane.
7 FSW input Switching frequency select input (low ≈ 2.5 MHz, high ≈ 1.25 MHz typical operation); internal ~400 kΩ pulldown resistor.
8 DEF input Output voltage scaling pin (low = nominal, high = nominal + 5%); internal ~400 kΩ pulldown resistor keeps logic low if floating.
9 SS/TR input Soft-start/tracking input; external capacitor sets internal voltage reference rise time for controlled startup and power sequencing applications.
10 AVIN power_in Analog supply voltage input for control circuitry, 3 V to 17 V range; must connect to same source as PVIN.
11 PVIN power_in Power supply voltage input for power stage, 3 V to 17 V range; must connect to same source as AVIN.
12 PVIN power_in Power supply voltage input for power stage, 3 V to 17 V range; must connect to same source as AVIN.
13 EN input Enable input (high = enabled, low = disabled and shutdown); internal ~400 kΩ pulldown resistor.
14 VOS input Output voltage sense pin; connection point for control loop circuitry.
15 PGND power_in Power ground; must be connected directly to exposed thermal pad and common ground plane.
16 PGND power_in Power ground; must be connected directly to exposed thermal pad and common ground plane.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS62142RGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps62142rgtr-etched.step / tps62142rgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62142rgtr.step / tps62142rgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 7151fc4cb879c36e, retrieved 2026-09-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF