component

TPS62134CRGTR

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Texas Instruments DC-DC Converters, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps62134crgtrfactory-2.0.0extractor-text

Verified TPS62134CRGTR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 17 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TPS62134CRGTR · QFN-16-EP(3x3) · 17 pins
  • ✓copper: 17 copper pads, none touching another net
  • ✓datasheet: all 17 pin names found in the 31-page datasheet
  • ✓distributor: lcsc C2072079, digikey 296-45047-2-ND, mouser 595-TPS62134CRGTR
  • ✓family: QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-itpj4ab1/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 17 pins = 17 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 17 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tps62134crgtr.kicad_sym✓ tps62134crgtr.kicad_mod✓ tps62134crgtr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers tps62134crgtr: viewers · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
tps62134crgtr-etched.glb Publish 0.1.0 · Ray 1d ago
tps62134crgtr-etched.step tps62134crgtr: factory component page (tier=mfr) · Ray 1d ago
tps62134crgtr-hero.glb tps62134crgtr: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
tps62134crgtr-hero.overlay.json Publish 0.1.0 · Ray 1d ago
tps62134crgtr.glb Publish 0.1.0 · Ray 1d ago
tps62134crgtr.kicad_mod Publish 0.1.0 · Ray 1d ago
tps62134crgtr.kicad_sym Publish 0.1.0 · Ray 1d ago
tps62134crgtr.lbr Publish 0.1.0 · Ray 1d ago
tps62134crgtr.step Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier mfr, 17 pins · Ray 1d ago

TPS62134CRGTR

Texas Instruments · DC-DC Converters · QFN-16-EP(3x3)

TPS62134CRGTR from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOS input Output voltage sense pin for the control loop circuitry; it must be connected directly at the output capacitor.
2 SW power_out Switch node connected to the internal MOSFET switches; connect the inductor between SW and the output capacitor.
3 SW power_out Switch node connected to the internal MOSFET switches; connect the inductor between SW and the output capacitor.
4 PG output Open-drain output power-good pin that requires a pullup resistor; leave floating if not used.
5 FBS input Output-voltage feedback pin used for positive remote sense of the load voltage; it must be connected close to the load-supply node on the output bus.
6 AGND power_in Analog ground pin that must be connected directly to the exposed thermal pad and common ground plane.
7 SS output Soft-start pin; an external capacitor connected to this pin sets the soft-start time.
8 VID1 input Output-voltage selection pin (VIDx) for dynamic output-voltage change.
9 VID0 input Output-voltage selection pin (VIDx) for dynamic output-voltage change.
10 AVIN power_in Supply-voltage pin for the internal control circuitry; connect to the same source as PVIN, with input range 3 V to 17 V.
11 PVIN power_in Supply-voltage pin for the internal power stage, with input range 3 V to 17 V.
12 PVIN power_in Supply-voltage pin for the internal power stage, with input range 3 V to 17 V.
13 EN input Enable and disable input; an internal pulldown resistor holds logic-level low if the pin is floating.
14 LPM input Low-power-mode input pin that reduces the output voltage when used.
15 PGND power_in Power ground pin that must be connected directly to the exposed thermal pad and common ground plane.
16 PGND power_in Power ground pin that must be connected directly to the exposed thermal pad and common ground plane.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VI 3 17 V 4
Input voltage (AVIN, PVIN) VI 3 17 V 4
PG pin pullup resistor voltage V(PG) 0 6 V 4
Output current IO 0 3 A 3 V ≤ VI < 5 V 4
Output current IO 0 3.2 A 5 V ≤ VI ≤ 17 V 4
Operating junction temperature TJ -40 125 °C 4
Voltage at pins AVIN, PVIN VI -0.3 20 V 4
Voltage at pins EN, SW -0.3 V max VI + 0.3 V 4
Voltage at pins SS, PG, VOS, VID0, VID1, LPM -0.3 7 V 4
Voltage at pin FBS -0.3 3 V 4
Sink current PG 0 2 mA 4
Operating junction temperature TJ -40 150 °C 4
Storage temperature Tstg -65 150 °C 4
Junction-to-ambient thermal resistance RθJA 44.2 °C/W 4
Junction-to-case (top) thermal resistance RθJC(top) 51 °C/W 4
Junction-to-board thermal resistance RθJB 16.6 °C/W 4
Junction-to-case (bottom) thermal resistance RθJC(bot) 3.7 °C/W 4
Input voltage range VI 3 17 V 5
Operating quiescent current IQ 20 35 µA EN = High, no load, device not switching, TJ = -40 °C to 85 °C 5
Operating quiescent current IQ 58 µA EN = High, no load, device not switching, TJ = 125 °C 5
Shutdown current into AVIN and PVIN ISD 2 9 µA EN = Low, TJ = -40 °C to +85 °C 5
Shutdown current into AVIN and PVIN ISD 18 µA EN = Low, TJ = 125 °C 5
Undervoltage lockout threshold V(UVLO) 2.6 2.7 2.8 V VI falling 5
Undervoltage lockout threshold V(UVLO) 2.8 2.9 3 V VI rising 5
Input leakage current at EN, VIDx, LPM Ilkg 0.01 1 µA EN, VIDx, LPM = 3.3 V 5
Power good threshold DC voltage VTH(PG) 736 760 784 mV VO rising 5
Power good threshold DC voltage VTH(PG) 696 720 752 mV VO falling 5
Power good output low voltage VOL(PG) 0.07 0.3 V I(PG) = -2 mA 5
Input leakage current at PG Ilkg(PG) 1 400 nA V(PG) = 1.8 V 5
SS pin source current I(SS) 2.3 2.5 2.7 µA 5
High-side MOSFET on-resistance rDS(on_H) 90 170 mΩ VI ≥ 6 V 5
Low-side MOSFET on-resistance rDS(on_L) 40 70 mΩ VI ≥ 6 V 5
High-side MOSFET DC current-limit IL 3.6 4.4 5.4 A VI ≥ 5 V, TJ = 25 °C 5
Input leakage current at FBS Ilkg(FBS) 1 100 nA V(FBS) = 1.1 V 5
Output voltage accuracy VO(A) -1 1 % PWM mode 5
Output voltage accuracy VO(A) -1 3 % PSM mode, LPM = High 5

CAD (KiCad official)

  • Symbol: TPS62134CRGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps62134crgtr-etched.step / tps62134crgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62134crgtr.step / tps62134crgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 025c93b0451bd3e1, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF