component
TPS62130RGTR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS62130RGTR
Texas Instruments · DC-DC Converters · QFN-16-EP(3x3)
TPS62130RGTR from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | output | Switch node connected to internal MOSFET switches. |
| 2 | SW | output | Switch node connected to internal MOSFET switches. |
| 3 | SW | output | Switch node connected to internal MOSFET switches. |
| 4 | PG | output | Open-drain power good output (high = VOUT ready, low = VOUT below nominal regulation); requires external pull-up resistor. |
| 5 | FB | input | Voltage feedback input for adjustable version; connect resistive voltage divider to set output voltage (max 7V). |
| 6 | AGND | power_in | Analog ground; must be connected directly to exposed thermal pad and common ground plane. |
| 7 | FSW | input | Switching frequency select input (low ≈ 2.5 MHz, high ≈ 1.25 MHz typical); internal pull-down; max 7V. |
| 8 | DEF | input | Output voltage scaling input (low = nominal, high = nominal + 5%); internal pull-down; max 7V. |
| 9 | SS/TR | input | Soft-start/tracking input pin; external capacitor sets voltage reference rise time for startup and tracking sequencing; max VIN+0.3V. |
| 10 | AVIN | power_in | Supply voltage for control circuitry (3V to 17V); must connect to same source as PVIN. |
| 11 | PVIN | power_in | Supply voltage for power stage (3V to 17V); must connect to same source as AVIN. |
| 12 | PVIN | power_in | Supply voltage for power stage (3V to 17V); must connect to same source as AVIN. |
| 13 | EN | input | Enable input (high = enabled, low = disabled/shutdown); internal pull-down; max VIN+0.3V. |
| 14 | VOS | input | Output voltage sense pin for control loop circuitry connection; max 7V. |
| 15 | PGND | power_in | Power ground; must be connected directly to exposed thermal pad and common ground plane. |
| 16 | PGND | power_in | Power ground; must be connected directly to exposed thermal pad and common ground plane. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
TPS62130RGTR - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tps62130rgtr-etched.step/tps62130rgtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps62130rgtr.step/tps62130rgtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
f9b1af285622c0cf, retrieved 2026-09-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).