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Contents

README

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TPS62130ARGTR

Texas Instruments · DC-DC Converters · QFN-16-EP(3x3)

TPS62130ARGTR from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switch node connected to internal MOSFET switches; connect inductor between this node and output capacitor.
2 SW output Switch node connected to internal MOSFET switches; connect inductor between this node and output capacitor.
3 SW output Switch node connected to internal MOSFET switches; connect inductor between this node and output capacitor.
4 PG tri_state Open-drain power-good output (High at 92%-98% nominal indicates VOUT ready, Low indicates VOUT below regulation); requires pullup resistor.
5 FB input Feedback voltage input (nominal 0.8 V) for adjustable output version; connect resistive divider to program output voltage between 0.9 V and 6 V.
6 AGND power_in Analog ground must be connected directly to exposed thermal pad and common ground plane.
7 FSW input Switching frequency select input with internal ~400 kΩ pulldown; Low selects ~2.5 MHz, High selects ~1.25 MHz typical operation.
8 DEF input Output voltage scaling input with internal ~400 kΩ pulldown; Low = nominal voltage, High = nominal voltage plus 5%.
9 SS/TR input Soft-start/tracking input with 2.5 µA source current for external capacitor to set output voltage ramp rate and enable voltage tracking.
10 AVIN power_in Analog supply voltage input (3 V to 17 V recommended); must be connected to same source as PVIN with 0.1 µF bypass capacitor to AGND.
11 PVIN power_in Power stage supply voltage input (3 V to 17 V recommended); must be connected to same source as AVIN with 10 µF decoupling capacitor.
12 PVIN power_in Power stage supply voltage input (3 V to 17 V recommended); must be connected to same source as AVIN with 10 µF decoupling capacitor.
13 EN input Enable input with internal ~400 kΩ pulldown; High enables device operation, Low forces shutdown with <2 µA shutdown current (ISD typical 1.5 µA).
14 VOS input Output voltage sense input providing feedback voltage to control loop circuitry; must connect directly to VOUT at output capacitor.
15 PGND power_in Power ground must be connected directly to exposed thermal pad and common ground plane.
16 PGND power_in Power ground must be connected directly to exposed thermal pad and common ground plane.
17 Exposed Thermal Pad passive Thermal and mechanical connection point soldered to PCB; must be connected to AGND (pin 6), PGND (pins 15-16), and common ground plane for proper power dissipation and mechanical reliability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS62130ARGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps62130argtr-etched.step / tps62130argtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62130argtr.step / tps62130argtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 f9b1af285622c0cf, retrieved 2026-09-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF