# TPS62092RGTR

**Texas Instruments** · DC-DC Converters · TQFN-16-EP(3x3)

TPS62092RGTR from Texas Instruments, in a TQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | bidirectional | Switch pin of the power stage; absolute maximum voltage is -0.3 V to VIN + 0.3 V. |
| 2 | SW | bidirectional | Switch pin of the power stage; absolute maximum voltage is -0.3 V to VIN + 0.3 V. |
| 3 | FREQ | input | Selects switching frequency: Low sets 2.8 MHz and High sets 1.4 MHz; it has a typical 400 kΩ active pull-down and can be left floating for 2.8 MHz operation. |
| 4 | PG | output | Open-drain power good output that is high impedance in regulation and pulled low when the output is below nominal; the pull-up must not connect to a voltage above the device input voltage, and sink current is limited to 1 mA. |
| 5 | FB | input | Feedback pin; for the fixed-output versions it may be connected to GND for improved thermal performance and has a typical 400 kΩ pull-down active when EN is low; absolute maximum rating is 7 V. |
| 6 | AGND | power_in | Analog ground, connected to the exposed thermal pad. |
| 7 | CP | bidirectional | Internal charge pump flying capacitor pin; connect a 10 nF capacitor between CP and CN, with absolute maximum voltage of -0.3 V to VIN + 7.0 V. |
| 8 | CN | bidirectional | Internal charge pump flying capacitor pin; connect a 10 nF capacitor between CP and CN, with absolute maximum voltage of -0.3 V to VIN + 7.0 V. |
| 9 | SS | input | Softstart control pin; a capacitor on this pin sets the softstart time, and leaving it floating sets the minimum start-up time. |
| 10 | AVIN | power_in | Bias supply input voltage pin; recommended VIN range is 2.5 V to 6 V, with absolute maximum of 7 V. |
| 11 | PVIN | power_in | Power supply input voltage pin; recommended VIN range is 2.5 V to 6 V, with absolute maximum of 7 V. |
| 12 | PVIN | power_in | Power supply input voltage pin; recommended VIN range is 2.5 V to 6 V, with absolute maximum of 7 V. |
| 13 | EN | input | Device enable; must be pulled high to enable the device and pulled low to disable it, with a typical 400 kΩ pull-down active when EN is low. |
| 14 | PGND | power_in | Power ground connection. |
| 15 | PGND | power_in | Power ground connection. |
| 16 | VOS | input | Output voltage sense pin; it must be connected to the output voltage. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TQFN-16-EP(3x3) |
| Category | Power Supply Chip |
| Pins | 17 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN Input voltage range | VIN | 2.5 |  | 6 | V |  | 5 |
| Shutdown current | Isd |  | 0.6 | 5 | µA | Into PVIN and AVIN | 5 |
| Undervoltage lockout threshold |  | 2.1 | 2.2 | 2.3 | V | VIN falling | 5 |
| High level input voltage (EN, FREQ) | VH | 1 |  |  | V | VIN = 2.5 V to 6 V | 5 |
| Low level input voltage (EN, FREQ) | VL |  |  | 0.4 | V | VIN = 2.5 V to 6 V | 5 |
| Input leakage current (EN, FREQ) | Ilkg |  | 10 | 100 | nA | EN, FREQ = GND or VIN | 5 |
| Softstart current | ISS | 6.3 | 7.5 | 8.7 | µA |  | 5 |
| Power good threshold, output voltage rising | Vth | 93 | 95 | 97 | % | Output voltage rising | 5 |
| Power good threshold, output voltage falling | Vth | 88 | 90 | 92 | % | Output voltage falling | 5 |
| Power good low level voltage | VL |  |  | 0.4 | V | I(sink) = 1 mA | 5 |
| PG sinking current | IPG |  |  | 1 | mA |  | 5 |
| Power good leakage current | Ilkg |  | 10 | 100 | nA | VPG = 3.6 V | 5 |
| High side FET switch current limit | ILIM | 3.7 | 4.6 | 5.5 | A | High side FET switch current limit | 5 |
| Output voltage range | Vs | 0.8 |  |  | V | Maximum printed as VIN | 5 |
| Output voltage accuracy (PWM) | VOUT | -1.4 |  | 1.4 | % | VIN ≥ VOUT + 1 V, fixed output voltage; IOUT = 1 A, PWM mode | 5 |
| Output voltage accuracy (PFM) | VOUT | -1.4 |  | 2.5 | % | VIN ≥ VOUT + 1 V, fixed output voltage; IOUT = 0 mA, FREQ = High and Low, PFM mode | 5 |
| Quiescent current | IQIN |  | 20 |  | µA | Not switching, FB = FB +5%, into PVIN and AVIN | 5 |
| Undervoltage lockout hysteresis |  |  | 200 |  | mV |  | 5 |
| Thermal shutdown |  |  | 150 |  | ºC | Temperature rising | 5 |
| Thermal shutdown hysteresis |  |  | 20 |  | ºC |  | 5 |
| Pull down resistance (EN, FREQ) | RPD |  | 400 |  | kΩ |  | 5 |
| High side FET on-resistance | RDS(on) |  | 50 |  | mΩ | ISW = 500 mA | 5 |
| Low side FET on-resistance | RDS(on) |  | 40 |  | mΩ | ISW = 500 mA | 5 |
| Switching frequency (FREQ = GND) | fs |  | 2.8 |  | MHz | FREQ = GND, IOUT = 3 A | 5 |
| Switching frequency (FREQ = VIN) | fs |  | 1.4 |  | MHz | FREQ = VIN, IOUT = 3 A | 5 |
| Output discharge resistor | Rod |  | 200 |  | Ω | EN = GND, VOUT = 1.8 V | 5 |
| Line regulation |  |  | 0.016 |  | %/V | VOUT = 1.8 V, PWM operation | 5 |
| Load regulation |  |  | 0.04 |  | %/A | VOUT = 1.8 V, PWM operation | 5 |
| Input voltage range (voltage on PVIN, AVIN, FB, SS, EN, FREQ, VOS) |  | -0.3 |  | 7 | V | Voltage range with respect to network ground pin | 4 |
| Voltage on SW, PG |  | -0.3 |  |  | V | Printed maximum VIN + 0.3 V | 4 |
| Voltage on CN, CP |  | -0.3 |  |  | V | Printed maximum VIN + 7.0 V | 4 |
| Power Good sink current | PG |  |  | 1 | mA |  | 4 |
| Operating junction temperature | TJ | -40 |  | 150 | °C |  | 4 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 4 |
| ESD human body model (HBM) | V(ESD) | -2000 |  | 2000 | V | Per ANSI/ESDA/JEDEC JS-001, all pins | 4 |
| ESD charged device model (CDM) | V(ESD) | -500 |  | 500 | V | Per JEDEC JESD22-C101, all pins | 4 |
| Input voltage range (recommended) | VIN | 2.5 |  | 6 | V |  | 4 |
| Operating ambient temperature | TA | -40 |  | 85 | °C |  | 4 |
| Operating junction temperature (recommended) | TJ | -40 |  | 125 | °C |  | 4 |
| Junction-to-ambient thermal resistance | RθJA |  | 47 |  | °C/W | QFN (16 pins) | 4 |
| Junction-to-case (top) thermal resistance | RθJCtop |  | 60 |  | °C/W | QFN (16 pins) | 4 |
| Junction-to-board thermal resistance | RθJB |  | 20 |  | °C/W | QFN (16 pins) | 4 |
| Junction-to-top characterization parameter | ψJT |  | 1.5 |  | °C/W | QFN (16 pins) | 4 |
| Junction-to-board characterization parameter | ψJB |  | 20 |  | °C/W | QFN (16 pins) | 4 |
| Junction-to-case (bottom) thermal resistance | RθJCbot |  | 5.3 |  | °C/W | QFN (16 pins) | 4 |

## CAD (KiCad official)

- Symbol: `TPS62092RGTR`
- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`
- 3D model: TQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `tps62092rgtr-etched.step` / `tps62092rgtr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps62092rgtr.step` / `tps62092rgtr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps62092.pdf) (32 pp, sha256 `1aca00440b3d4033`, retrieved 2026-10-08, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps62092rgtr-datasheet.pdf)