component

TPS62091RGTT

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps62091rgttfactory-2.0.0extractor-text
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TPS62091RGTT

Texas Instruments · DC-DC Converters · QFN-16-EP(3x3)

TPS62091RGTT from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW power_out Switch pin of the power stage (datasheet lists its direction as I; typed here as power_out because it is the switching node driving the inductor).
2 SW power_out Switch pin of the power stage (datasheet lists its direction as I; typed here as power_out because it is the switching node driving the inductor).
3 FREQ input Selects switching frequency: FREQ low sets 2.8 MHz typical, FREQ high sets 1.4 MHz typical; it has a ~400 kΩ internal pull-down and can be left floating for 2.8 MHz operation.
4 PG output Open-drain power good output: high impedance when the output is in regulation and pulled low when below nominal; the pull-up resistor must not be connected to any voltage higher than the device input voltage.
5 FB input Feedback pin; for the fixed-output versions (this MPN is the 3.3 V version) connect it to GND for improved thermal performance, or leave it floating since it is internally connected with 400 kΩ to GND.
6 AGND power_in Analog ground; the exposed thermal pad is also connected to AGND.
7 CP passive Internal charge pump flying capacitor terminal; connect a 10 nF capacitor between CP and CN.
8 CN passive Internal charge pump flying capacitor terminal; connect a 10 nF capacitor between CP and CN.
9 SS input Soft-start control pin; a capacitor on this pin sets the soft-start time, and leaving it floating sets the minimum start-up time.
10 AVIN power_in Bias supply input voltage pin (device operates from 2.5 V to 6 V input range).
11 PVIN power_in Power supply input voltage pin (input voltage range 2.5 V to 6 V).
12 PVIN power_in Power supply input voltage pin (input voltage range 2.5 V to 6 V).
13 EN input Device enable: pull high to enable and pull low to disable; it has an internal ~400 kΩ pull-down.
14 PGND power_in Power ground connection.
15 PGND power_in Power ground connection.
16 VOS input Output voltage sense pin; it must be connected to the output voltage.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS62091RGTT
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps62091rgtt-etched.step / tps62091rgtt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62091rgtt.step / tps62091rgtt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 0cf38963899420c5, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF