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TPS62051DGSR
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Texas Instruments DC-DC Converters, VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS62051DGSR
Texas Instruments · DC-DC Converters · VSSOP-10-0.5mm
TPS62051DGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input operating range 2.7 V to 10 V. |
| 2 | LBO | output | Open-drain low battery output; logic low indicates low battery voltage condition. |
| 3 | GND | power_in | Ground connection for signal and control circuits. |
| 4 | PG | output | Open-drain power good comparator output that floats when output voltage exceeds 95% of nominal value; pull-up resistor must be connected to VOUT. |
| 5 | FB | input | Feedback pin for adjustable output version with external resistive divider or internal voltage divider for fixed output version. |
| 6 | LBI | input | Low battery input for detecting low battery voltage condition. |
| 7 | SYNC | input | Input for external clock synchronization (600 kHz to 1.2 MHz) or control selection between fixed PWM and PWM/PFM operating modes. |
| 8 | EN | input | Enable input; logic high enables converter operation, logic low forces shutdown mode with less than 2 µA quiescent current. |
| 9 | SW | output | Switch output connected to external inductor and internal power MOSFET drain. |
| 10 | PGND | power_in | Power ground connection; all power ground references must be connected to this pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Power Management (PMIC) |
| Pins | 10 |
CAD (KiCad official)
- Symbol:
TPS62051DGSR - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files:
tps62051dgsr-etched.step/tps62051dgsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps62051dgsr.step/tps62051dgsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
9f3ac08fee779ace, retrieved 2026-10-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS62051DGSR
**Texas Instruments** · DC-DC Converters · VSSOP-10-0.5mm
TPS62051DGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input operating range 2.7 V to 10 V. |
| 2 | LBO | output | Open-drain low battery output; logic low indicates low battery voltage condition. |
| 3 | GND | power_in | Ground connection for signal and control circuits. |
| 4 | PG | output | Open-drain power good comparator output that floats when output voltage exceeds 95% of nominal value; pull-up resistor must be connected to VOUT. |
| 5 | FB | input | Feedback pin for adjustable output version with external resistive divider or internal voltage divider for fixed output version. |
| 6 | LBI | input | Low battery input for detecting low battery voltage condition. |
| 7 | SYNC | input | Input for external clock synchronization (600 kHz to 1.2 MHz) or control selection between fixed PWM and PWM/PFM operating modes. |
| 8 | EN | input | Enable input; logic high enables converter operation, logic low forces shutdown mode with less than 2 µA quiescent current. |
| 9 | SW | output | Switch output connected to external inductor and internal power MOSFET drain. |
| 10 | PGND | power_in | Power ground connection; all power ground references must be connected to this pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Power Management (PMIC) |
| Pins | 10 |
## CAD (KiCad official)
- Symbol: `TPS62051DGSR`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files: `tps62051dgsr-etched.step` / `tps62051dgsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps62051dgsr.step` / `tps62051dgsr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps62050) (31 pp, sha256 `9f3ac08fee779ace`, retrieved 2026-10-05, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps62051dgsr-datasheet.pdf)