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TPS62004DGSR

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Texas Instruments DC-DC Converters, VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS62004DGSR

Texas Instruments · DC-DC Converters · VSSOP-10-0.5mm

TPS62004DGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Supply voltage input for the converter, specified from 2 V to 5.5 V in the recommended operating conditions.
2 FC power_in Supply bypass pin; a 0.1-µF coupling capacitor should be placed as close as possible to this pin for high-frequency input supply filtering.
3 GND power_in Ground reference for the device.
4 PG output Open-drain power good output that needs a pull-up resistor to VOUT and goes active high when the output voltage is greater than 92% of the nominal value.
5 FB input Feedback pin for the fixed output voltage option (TPS62004 is the 1.5 V fixed version); the internal divider is disabled for the adjustable version, which uses an external resistive divider.
6 ILIM input Switch current limit select: connect to GND for a typical 600 mA limit or to VIN for a typical 1200 mA limit.
7 SYNC input CMOS-level input that synchronizes the switching frequency to an external clock (up to 1 MHz); SYNC high forces low-noise fixed-frequency PWM, and SYNC low (GND) enables power save PFM/PWM mode.
8 EN input Enable input: logic high enables the converter, while logic low forces shutdown and reduces supply current to less than 1 µA.
9 L bidirectional Inductor connection and switch pin tied to the drain of the internal power MOSFETs.
10 PGND power_in Power ground; all power grounds must be connected to PGND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-10-0.5mm
Category Power Supply Chip
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN Input voltage range (IOUT = 0 mA to 600 mA) VIN 2.5 5.5 V IOUT = 0 mA to 600 mA 5
VIN Input voltage range (IOUT = 0 mA to 200 mA) VIN 2 5.5 V IOUT = 0 mA to 200 mA 5
Operating quiescent current I(Q) 50 75 μA IOUT = 0 mA, SYNC = GND (PFM-mode enabled) 5
Shutdown current I(SD) 0.1 1 μA EN = GND 5
EN high-level input voltage VIH 1.3 V 5
EN low-level input voltage VIL 0.4 V 5
EN input leakage current Ilkg 0.01 0.1 μA EN = GND or VIN 5
Undervoltage lockout threshold V(UVLO) 1.2 1.6 1.95 V 5
P-channel current limit I(LIM) 800 1200 1600 mA 2.5 V ≤ VIN ≤ 5.5 V, ILIM = VIN 5
P-channel current limit I(LIM) 390 600 900 mA 2 V ≤ VIN ≤ 5.5 V, ILIM = GND 5
ILIM high-level input voltage VIH 1.3 V 5
ILIM low-level input voltage VIL 0.4 V 5
ILIM input leakage current Ilkg 0.01 0.1 μA ILIM = GND or VIN 5
Power good threshold V(PG) 88 92 94 % Feedback voltage falling 5
PG output low voltage VOL 0.3 V V(FB) = 0.8 × VOUT nominal, I(sink) = 10 μA 5
PG output leakage current Ilkg 0.01 1 μA V(FB) = VOUT nominal 5
Minimum supply voltage for valid power good signal 1.2 V 5
Oscillator frequency fs 500 750 1000 kHz 5
Synchronization range f(SYNC) 500 1000 kHz CMOS-logic clock signal on SYNC pin 5
SYNC high level input voltage VIH 1.3 V 5
SYNC low level input voltage VIL 0.4 V 5
SYNC input leakage current Ilkg 0.01 0.1 μA SYNC = GND or VIN 5
Duty cycle of external clock signal 20 60 % 5
Fixed output voltage tolerance (TPS62004, 1.5 V) VOUT -3 4 % VIN = 2.5 V to 5.5 V; 0 mA ≤ IOUT ≤ 600 mA 6
Fixed output voltage tolerance (TPS62004, 1.5 V) VOUT -3 3 % 10 mA < IOUT ≤ 600 mA 6
Start-up time 0.4 2 ms IOUT = 0 mA, time from active EN to VOUT 6
Supply voltage VIN (recommended) VIN 2 5.5 V 4
Output current, 3-cell operation IOUT 600 mA VIN ≥ 2.5 V; L = 10 μH, f = 750 kHz 4
Output current, 2-cell operation IOUT 200 mA VIN ≥ 2 V; L = 10 μH, f = 750 kHz 4
Operating ambient temperature TA -40 85 °C 4
Operating junction temperature TJ -40 125 °C 4
Supply voltages on pin VIN and FC VIN, FC -0.3 6 V All voltages with respect to network ground 4
Voltages on pins EN, ILIM, SYNC, PG, FB, L -0.3 V Maximum is printed as VIN + 0.3 V (expression, not computed) 4
Peak switch current 1.6 A 4
Operating junction temperature TJ -40 150 °C 4
Lead temperature (soldering) 260 °C Soldering, 10 sec 4
Storage temperature Tstg -65 150 °C 4
Junction-to-ambient thermal resistance (DGS) RθJA 160 °C/W 4
Junction-to-case (top) thermal resistance (DGS) RθJC(top) 51 °C/W 4
Junction-to-board thermal resistance (DGS) RθJB 73 °C/W 4
Junction-to-top characterization parameter (DGS) ψJT 5 °C/W 4
Junction-to-board characterization parameter (DGS) ψJB 72 °C/W 4
Inductor (recommended) L 10 μH 4
Input capacitor (recommended) CIN 10 μF 4
Output capacitor (recommended, VOUT ≥ 1.8 V) COUT 10 μF VOUT ≥ 1.8 V 4
Output capacitor (recommended, VOUT < 1.8 V) COUT 47 μF VOUT < 1.8 V 4

CAD (KiCad official)

  • Symbol: TPS62004DGSR
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
  • 3D model files: tps62004dgsr-etched.step / tps62004dgsr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps62004dgsr.step / tps62004dgsr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 c0f89c845b131ca5, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF