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TPS62003DGSR
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Texas Instruments DC-DC Converters, VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS62003DGSR
Texas Instruments · DC-DC Converters · VSSOP-10-0.5mm
TPS62003DGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input with recommended operating range of 2 V to 5.5 V. |
| 2 | FC | passive | Supply bypass pin; connect 0.1-μF coupling capacitor as close as possible to this pin for good high-frequency input voltage supply filtering. |
| 3 | GND | power_in | Ground reference terminal. |
| 4 | PG | output | Open-drain power good comparator output that goes active high when the output voltage is greater than 92% of the nominal value; requires pull-up resistor to VOUT. |
| 5 | FB | input | Feedback input pin for fixed output voltage option; external resistive divider connected to FB in adjustable version with internal voltage divider disabled. |
| 6 | ILIM | input | Switch current limit pin; connect to GND for typically 600 mA current limit or to VIN for typically 1200 mA current limit. |
| 7 | SYNC | input | External clock synchronization input accepting CMOS levels; logic high enables fixed frequency PWM mode, logic low (GND) enables power save mode with PFM/PWM operation. |
| 8 | EN | input | Enable input; logic high enables the converter, logic low forces shutdown mode with supply current less than 1 μA. |
| 9 | L | bidirectional | Inductor and switch pin connected to the drain of the internal power MOSFETS. |
| 10 | PGND | power_in | Power ground terminal; connect all power grounds to this pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Power Supply Chip |
| Pins | 10 |
CAD (KiCad official)
- Symbol:
TPS62003DGSR - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files:
tps62003dgsr-etched.step/tps62003dgsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps62003dgsr.step/tps62003dgsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
c0f89c845b131ca5, retrieved 2026-10-03, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS62003DGSR
**Texas Instruments** · DC-DC Converters · VSSOP-10-0.5mm
TPS62003DGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input with recommended operating range of 2 V to 5.5 V. |
| 2 | FC | passive | Supply bypass pin; connect 0.1-μF coupling capacitor as close as possible to this pin for good high-frequency input voltage supply filtering. |
| 3 | GND | power_in | Ground reference terminal. |
| 4 | PG | output | Open-drain power good comparator output that goes active high when the output voltage is greater than 92% of the nominal value; requires pull-up resistor to VOUT. |
| 5 | FB | input | Feedback input pin for fixed output voltage option; external resistive divider connected to FB in adjustable version with internal voltage divider disabled. |
| 6 | ILIM | input | Switch current limit pin; connect to GND for typically 600 mA current limit or to VIN for typically 1200 mA current limit. |
| 7 | SYNC | input | External clock synchronization input accepting CMOS levels; logic high enables fixed frequency PWM mode, logic low (GND) enables power save mode with PFM/PWM operation. |
| 8 | EN | input | Enable input; logic high enables the converter, logic low forces shutdown mode with supply current less than 1 μA. |
| 9 | L | bidirectional | Inductor and switch pin connected to the drain of the internal power MOSFETS. |
| 10 | PGND | power_in | Power ground terminal; connect all power grounds to this pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Power Supply Chip |
| Pins | 10 |
## CAD (KiCad official)
- Symbol: `TPS62003DGSR`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files: `tps62003dgsr-etched.step` / `tps62003dgsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps62003dgsr.step` / `tps62003dgsr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps62003) (32 pp, sha256 `c0f89c845b131ca5`, retrieved 2026-10-03, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps62003dgsr-datasheet.pdf)