component
TPS61390RTER
Public Made by Adomby adom
Texas Instruments DC-DC Converters, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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TPS61390RTER
Texas Instruments · DC-DC Converters · QFN-16-EP(3x3)
TPS61390RTER from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSP | output | Single-ended sample/hold voltage output for current measurement. |
| 2 | GAIN | input | Current mirror gain selection input; logic high selects 1:5 ratio, logic low selects 4:5 ratio. |
| 3 | MON2 | output | Current mirror output with 1:5 gain ratio; maximum voltage 2.5V. |
| 4 | MON1 | output | Current mirror output with 4:5 gain ratio; maximum voltage 2.5V. |
| 5 | APD | output | APD power supply output; supplies voltage from 20V to 85V. |
| 6 | MONIN | input | Current mirror input for APD current sensing; voltage rated to 85V. |
| 7 | GND | power_in | Power ground connection. |
| 8 | SW | output | Boost converter switching node connected to drain of low-side MOSFET and source of high-side MOSFET; voltage rated to 85V. |
| 9 | CAP | output | External filter capacitor connection for current mirror noise reduction; voltage rated to 85V. |
| 10 | VIN | power_in | DC power supply input; operates from 2.5V to 5.5V. |
| 11 | ISHORT | output | Current limit setting output; programming resistor connected to ground sets high optical power protection threshold. |
| 12 | FB | input | Feedback voltage input for output voltage regulation. |
| 13 | EN | input | Enable logic input; high enables device, low disables and enters shutdown mode. |
| 14 | SAMPLE | input | Sample/hold trigger input; rising edge triggers sample capture, falling edge holds measured value. |
| 15 | AVCC | power_in | Analog power supply for sample/hold and current mirror circuits. |
| 16 | AGND | power_in | Analog ground for sample/hold and current mirror circuits. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
TPS61390RTER - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tps61390rter-etched.step/tps61390rter-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps61390rter.step/tps61390rter.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
5f0d65a8c9549c87, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).