# TPS61299DRLR

**TEXAS INSTRUMENTS** · Global Sourcing Parts · SOT-563

TPS61299DRLR from TEXAS INSTRUMENTS, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | IC power supply input. |
| 2 | SW | output | Switch pin of the converter, connected to the drain of the internal low-side power MOSFET and the source of the internal high-side power MOSFET. |
| 3 | EN | input | Enable logic input; a logic high voltage enables the device, and with EN low the TPS61299x performs true disconnection between input and output. |
| 4 | VSEL | input | Boost output voltage selection pin; connect a resistor between this pin and ground to select one of 21 output voltages. |
| 5 | VOUT | power_out | Boost converter output. |
| 6 | GND | power_in | Ground. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TEXAS INSTRUMENTS |
| Package | SOT-563 |
| Category | Global Sourcing Parts |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on VIN, VOUT, SW, EN, VSEL |  | -0.3 |  | 6.5 | V |  | 5 |
| SW spike at 10 ns |  | -0.7 |  | 8 | V | SW spike at 10 ns | 5 |
| SW spike at 1 ns |  | -0.7 |  | 10 | V | SW spike at 1 ns | 5 |
| Operating junction temperature | TJ | -40 |  | 150 | °C |  | 5 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 5 |
| Input voltage | VIN | 0.5 |  | 5.5 | V |  | 5 |
| Boost output voltage | VOUT | 1.8 |  | 5.5 | V | for device with input current limit no more than 1.2A | 5 |
| Junction temperature | TJ | -40 |  | 125 | °C |  | 5 |
| Effective Inductance | L |  | 1 |  | µH |  | 5 |
| Effective Output Capacitance at the OUT pin | COUT |  | 10 |  | µF | output current lower than 1A | 5 |
| Effective Output Capacitance at the OUT pin | COUT |  | 20 |  | µF | output current higher than 1A, or TPS612997 is used | 5 |
| Effective Input Capacitance at the VIN pin | CIN |  | 2.2 |  | µF |  | 5 |
| Input voltage range | VIN | 0.5 |  | 5.5 | V | All | 6 |
| Output voltage setting range | VOUT | 1.8 |  | 5.5 | V | All | 6 |
| Output voltage accuracy | VOUT_ACY | -2 |  | 2 | % | PWM, PFM mode | 6 |
| Quiescent current into VOUT pin | IQ |  | 95 | 300 | nA | All IC enabled, No load, No switching, TJ up to 85°C | 6 |
| Leakage current into SW pin (from SW pin to VOUT pin) | ILKG_SW |  | 1 | 4 | nA | VSW=3.0V, VOUT=0V, TJ = 25°C | 6 |
| Leakage current into SW pin (from SW pin to GND pin) | ILKG_SW |  | 1 | 15 | nA | VSW=3.0V, VOUT=0V, TJ = 25°C | 6 |
| Leakage current into SW pin (from SW pin to GND pin) | ILKG_SW |  | 1 | 200 | nA | VSW=3.0V, VOUT=0V, TJ up to 85°C | 6 |
| Quiescent current into VIN pin | IQ |  | 1 |  | nA | All IC enabled, No load, No switching, TJ up to 85°C | 6 |
| Under-voltage lockout threshold (rising) | VIN_UVLO |  | 0.7 |  | V | TPS61299, VIN rising | 6 |
| Under-voltage lockout threshold (falling) | VIN_UVLO |  | 0.5 |  | V | All, VIN falling | 6 |
| Shutdown current into VIN pin | ISD |  | 60 |  | nA | EN = LOW, VIN = 3.6 V, VOUT = 0 V | 6 |
| High-side MOSFET on resistance | RDS(on) |  | 150 |  | mΩ | VOUT = 5.0 V | 7 |
| Low-side MOSFET on resistance | RDS(on) |  | 88 |  | mΩ | VOUT = 5.0 V | 7 |
| Input current limit | ILIM | 0.96 | 1.2 | 1.44 | A | VIN = 3.6 V, VOUT = 5.0 V | 7 |
| Inductor current ripple | ILH |  | 350 |  | mA |  | 7 |
| EN logic high threshold | VEN_H |  | 0.84 |  | V | VIN >= 1.05 V | 7 |
| EN logic low threshold | VEN_L |  | 0.36 |  | V | VIN >= 1.05 V | 7 |
| EN logic high threshold | VEN_H |  | 0.56 |  | V | VIN < 1.05 V | 7 |
| EN logic low threshold | VEN_L |  | 0.14 |  | V | VIN < 1.05 V | 7 |
| Leakage current into EN pin | IEN_LKG |  | 1 | 50 | nA | VEN=5V | 7 |
| EN pin pulldown resistor | REN |  | 800 |  | kΩ | EN=low | 7 |
| Thermal shutdown threshold | TSD |  | 150 |  | °C | TJ rising | 7 |
| Thermal shutdown hysteresis | TSD_HYS |  | 20 |  | °C | TJ falling below TSD | 7 |
| Junction-to-ambient thermal resistance | RθJA |  | 135.6 |  | °C/W | DRL 6-pins, Standard | 5 |
| Junction-to-ambient thermal resistance | RθJA |  | 93.8 |  | °C/W | DRL 6-pins, EVM | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 66.3 |  | °C/W | DRL 6-pins, Standard | 5 |
| Junction-to-board thermal resistance | RθJB |  | 24.6 |  | °C/W | DRL 6-pins, Standard | 5 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | the package greatly depends on the PCB type and layout. Using thick PCB copper and soldering GND pin to | 31 |

## CAD (KiCad official)

- Symbol: `TPS61299DRLR`
- Footprint: `Package_TO_SOT_SMD:SOT-563`
- 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files: `tps61299drlr-etched.step` / `tps61299drlr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps61299drlr.step` / `tps61299drlr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TEXAS INSTRUMENTS datasheet](https://www.ti.com/lit/ds/symlink/tps61299.pdf) (45 pp, sha256 `145d8a82ac68bcc9`, retrieved 2026-10-17, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps61299drlr-datasheet.pdf)