component
TPS61221DCKT
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SC-70-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 15d ago |
| viewers | 15d ago |
| package.json | 15d ago |
| page.json | 15d ago |
| README.md | 15d ago |
| tps61221dckt-etched.glb | 15d ago |
| tps61221dckt-etched.step | 15d ago |
| tps61221dckt-hero.glb | 15d ago |
| tps61221dckt-hero.overlay.json | 15d ago |
| tps61221dckt.glb | 15d ago |
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| tps61221dckt.lbr | 15d ago |
| tps61221dckt.step | 15d ago |
TPS61221DCKT
Texas Instruments · DC-DC Converters · SC-70-6
TPS61221DCKT from Texas Instruments, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Boost converter input voltage, operating range 0.7 V to 5.5 V. |
| 2 | FB | input | Voltage feedback of adjustable version; must be connected to VOUT at fixed output voltage versions such as the TPS61221 (3.3 V). |
| 3 | GND | power_in | Control / logic and power ground. |
| 4 | VOUT | power_out | Boost converter output voltage (3.3 V fixed for TPS61221). |
| 5 | L | passive | Connection for inductor. |
| 6 | EN | input | Enable input (1: enabled, 0: disabled); must be actively tied high or low and not left floating. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-6 |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| TPS61221 output voltage (3.3 V) | VOUT | 3.2 | 3.3 | 3.41 | V | VIN < VOUT | 4 |
| Input voltage | VIN | 0.7 | 5.5 | V | 4 | ||
| Minimum input voltage at startup | VIN | 0.7 | V | RLoad ≥ 150 Ω | 4 | ||
| Switch current limit | ISW | 240 | 400 | mA | VOUT = 3.3 V, VIN = 1.2 V, TA = 25°C | 4 | |
| Switch current limit | ISW | 200 | 400 | mA | VOUT = 3.3 V | 4 | |
| Rectifying switch on resistance | RDSon_HSD | 1000 | mΩ | VOUT = 3.3 V | 4 | ||
| Main switch on resistance | RDSon_LSD | 600 | mΩ | VOUT = 3.3 V | 4 | ||
| Quiescent current into VIN | IQ | 0.5 | 0.9 | μA | IO = 0 mA, VEN = VIN = 1.2 V, VOUT = 3.3 V | 4 | |
| Quiescent current into VOUT | IQ | 5 | 7.5 | μA | IO = 0 mA, VEN = VIN = 1.2 V, VOUT = 3.3 V | 4 | |
| Shutdown current VIN | ISD | 0.2 | 0.5 | μA | VEN = 0 V, VIN = 1.2 V, VOUT ≥ VIN | 4 | |
| Leakage current into VOUT | ILKG_VOUT | 1 | μA | VEN = 0 V, VIN = 1.2 V, VOUT = 3.3 V | 4 | ||
| Leakage current into L | ILKG_L | 0.01 | 0.2 | μA | VEN = 0 V, VIN = 1.2 V, VL = 1.2 V, VOUT ≥ VIN | 4 | |
| EN input current | IEN | 0.005 | 0.1 | μA | Clamped on GND or VIN (VIN < 1.5 V) | 4 | |
| EN input low voltage | VIL | 0.4 | V | 5 V > VIN > 1.5 V | 4 | ||
| EN input high voltage | VIH | 1.2 | V | 5 V > VIN > 1.5 V | 4 | ||
| Undervoltage lockout threshold | VUVLO | 0.5 | 0.7 | V | VIN decreasing | 5 | |
| Overvoltage protection threshold | 6 | 7.5 | V | 5 | |||
| Overtemperature protection | 140 | °C | 5 | ||||
| Overtemperature hysteresis | 20 | °C | 5 | ||||
| Input voltage on VIN, L, VOUT, EN, FB | VIN | -0.3 | 7.5 | V | 3 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 3 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| ESD HBM | V(ESD) | -2 | 2 | kV | per ANSI/ESDA/JEDEC JS-001, all pins | 3 | |
| ESD CDM | V(ESD) | -1.5 | 1.5 | kV | per JESD22-C101, all pins | 3 | |
| Supply voltage at VIN | VIN | 0.7 | 5.5 | V | 4 | ||
| Operating virtual junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 231.2 | °C/W | DCK, 6 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJCtop | 61.8 | °C/W | DCK, 6 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 78.8 | °C/W | DCK, 6 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 2.2 | °C/W | DCK, 6 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 78 | °C/W | DCK, 6 pins | 4 | ||
| Inductor current ripple | ILH | 200 | mA | 4 |
CAD (KiCad official)
- Symbol:
TPS61221DCKT - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files:
tps61221dckt-etched.step/tps61221dckt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps61221dckt.step/tps61221dckt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
94ade76ac047f32d, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).