# TPS61096ADSST

**Texas Instruments** · DC-DC Converters · WSON-12-EP(2x3)

TPS61096ADSST from Texas Instruments, in a WSON-12-EP(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LVI1 | input | Input of level shifter 1; absolute maximum voltage range is -0.3 V to 6 V. |
| 2 | LVI2 | input | Input of level shifter 2; absolute maximum voltage range is -0.3 V to 6 V. |
| 3 | VIN | power_in | IC power supply input, recommended 1.8 V to 5.5 V; absolute maximum voltage range is -0.3 V to 6 V. |
| 4 | SW | power_out | Switch pin of the boost converter, connected to the inductor; absolute maximum voltage range is -0.3 V to 32 V. |
| 5 | ILIM | input | Inductor peak current limit selection: logic low selects 250 mA, logic high selects 500 mA; must be actively tied high or low and never left floating, with absolute maximum range -0.3 V to 6 V. |
| 6 | EN | input | Enable logic input: logic high enables the device and logic low disables it; must be actively tied high or low and never left floating, with absolute maximum range -0.3 V to 6 V. |
| 7 | FB | input | Voltage feedback of the adjustable output voltage, connected to the center tap of the resistor divider; absolute maximum voltage range is -0.3 V to 3.6 V. |
| 8 | VOSNS | bidirectional | Boost converter output voltage sense pin, with an external resistor divider connected between this pin and FB; absolute maximum voltage range is -0.3 V to 32 V. |
| 9 | VOUT | power_out | Boost converter output, adjustable from 4.5 V to 28 V; absolute maximum voltage range is -0.3 V to 32 V. |
| 10 | GND | power_in | Ground pin. |
| 11 | HVO2 | output | Output of level shifter 2; absolute maximum voltage range is -0.3 V to 32 V. |
| 12 | HVO1 | output | Output of level shifter 1; absolute maximum voltage range is -0.3 V to 32 V. |
| 13 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-12-EP(2x3) |
| Category | Power Management (PMIC) |
| Pins | 13 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 1.8 |  | 5.5 | V |  | 5 |
| Undervoltage lockout threshold | VUVLO | 1.5 |  | 1.7 | V | Input voltage rising | 5 |
| Undervoltage lockout hysteresis |  | 0.2 |  | 0.3 | V |  | 5 |
| Quiescent current into VIN pin | IQ_VIN |  | 1.2 | 2.5 | µA | Device enabled, no load, no switching; -40°C ≤ TJ ≤ 85 °C | 5 |
| Shutdown current into VIN pin | ISD |  | 0.07 | 0.3 | µA | Device disabled; -40°C ≤ TJ ≤ 85 °C | 5 |
| Output voltage range | VOUT | 4.5 |  | 28 | V |  | 5 |
| Internal reference voltage | VREF | 0.98 | 1 | 1.02 | V |  | 5 |
| Output overvoltage protection threshold | VOVP | 28.2 | 29.4 | 30.6 | V | Rising edge at VOUT pin | 5 |
| Overvoltage protection hysteresis | VOVP_HYS | 0.4 | 0.8 | 1.2 | V |  | 5 |
| MOSFET on-resistance | RDS(on) |  | 450 | 700 | mΩ | VIN = 3.6 V | 5 |
| Peak switch current limit, ILIM low | IILIM | 0.15 | 0.25 | 0.35 | A | ILIM = Low | 5 |
| Peak switch current limit, ILIM high | IILIM | 0.35 | 0.5 | 0.6 | A | ILIM = High | 5 |
| Soft-start time | tSS | 1 |  | 4.5 | ms |  | 5 |
| Level shifter quiescent current into VOUT pin, LVIx low | IQ_LS |  | 0.5 | 1 | µA | Both level shifter channel enabled, LVIx = Low | 5 |
| Level shifter quiescent current into VOUT pin, LVIx high | IQ_LS |  | 1.5 | 3 | µA | Both level shifter channel enabled, LVIx = High | 5 |
| Input voltage | VIN | 1.8 |  | 5.5 | V |  | 4 |
| Boost converter output voltage | VOUT | 4.5 |  | 28 | V |  | 4 |
| Inductor | L | 1 | 2.2 | 47 | µH |  | 4 |
| Input capacitor | CIN | 1 | 4.7 |  | µF |  | 4 |
| Output capacitor | COUT | 10 | 10 | 100 | µF |  | 4 |
| Operating junction temperature | TJ | -40 |  | 125 | °C |  | 4 |
| Voltage range at terminals VIN, EN, ILIM, LVI1, LVI2 |  | -0.3 |  | 6 | V |  | 4 |
| Voltage range at terminal FB |  | -0.3 |  | 3.6 | V |  | 4 |
| Voltage range at terminals SW, VOUT, VOSNS, HVO1, HVO2 |  | -0.3 |  | 32 | V |  | 4 |
| Operating junction temperature | TJ | -40 |  | 150 | °C |  | 4 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 4 |
| Junction-to-ambient thermal resistance, DSS (WSON) 12 pins | RθJA |  | 65.1 |  | °C/W |  | 4 |
| Junction-to-case (top) thermal resistance, DSS (WSON) 12 pins | RθJC(top) |  | 72.4 |  | °C/W |  | 4 |
| Junction-to-board thermal resistance, DSS (WSON) 12 pins | RθJB |  | 29.7 |  | °C/W |  | 4 |
| Junction-to-top characterization parameter, DSS (WSON) 12 pins | ψJT |  | 2.5 |  | °C/W |  | 4 |
| Junction-to-board characterization parameter, DSS (WSON) 12 pins | ψJB |  | 29.7 |  | °C/W |  | 4 |
| Junction-to-case (bottom) thermal resistance, DSS (WSON) 12 pins | RθJC(bot) |  | 10.7 |  | °C/W |  | 4 |

## CAD (KiCad official)

- Symbol: `TPS61096ADSST`
- Footprint: `Package_SON:WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65`
- 3D model: WSON-12-EP(2x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `tps61096adsst-etched.step` / `tps61096adsst-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps61096adsst.step` / `tps61096adsst.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps61096a) (27 pp, sha256 `e9119773ca737076`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps61096adsst-datasheet.pdf)