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TPS61032PWPR

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs tps61032pwpr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers tps61032pwpr: viewers · Ray 1mo ago
package.json tps61032pwpr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json tps61032pwpr: specified limits as data (metadata.characteristics, 28 rows from the datasheet) · Ray 25d ago
README.md tps61032pwpr: specified limits as data (metadata.characteristics, 28 rows from the datasheet) · Ray 25d ago
tps61032pwpr-etched.fit.json tps61032pwpr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps61032pwpr-etched.glb tps61032pwpr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps61032pwpr-etched.step tps61032pwpr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps61032pwpr.glb Publish 0.1.0 · Ray 1mo ago
tps61032pwpr.kicad_mod Publish 0.1.0 · Ray 1mo ago
tps61032pwpr.kicad_sym Publish 0.1.0 · Ray 1mo ago
tps61032pwpr.lbr Publish 0.1.0 · Ray 1mo ago
tps61032pwpr.step Publish 0.1.0 · Ray 1mo ago

TPS61032PWPR

Texas Instruments · DC-DC Converters · HTSSOP-16-EP

TPS61032PWPR from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switching node connecting boost converter to external inductor for step-up energy transfer; supports peak switch currents up to 4500 mA at 5 V output
2 SW output Switching node connecting boost converter to external inductor for step-up energy transfer; supports peak switch currents up to 4500 mA at 5 V output
3 PGND power_out Power ground return for boost MOSFET source connection and high-current power path
4 PGND power_out Power ground return for boost MOSFET source connection and high-current power path
5 PGND power_out Power ground return for boost MOSFET source connection and high-current power path
6 VBAT power_in Supply voltage input with recommended operating range 1.8 V to 5.5 V for single-cell lithium-ion or two to three-cell alkaline batteries
7 LBI input Low battery comparator analog input with 500 mV nominal switching threshold and 10 mV hysteresis for battery voltage detection
8 SYNC input Synchronization and power save mode control pin; high voltage disables power save mode, low enables power save mode, or accepts external clock signal ±20% of nominal 600 kHz
9 EN input Device enable input; logic high enables converter operation, logic low forces shutdown mode with complete load isolation from battery
10 LBO output Low battery comparator open-drain output; active low when LBI voltage falls below 500 mV threshold voltage
11 GND power_out Control and logic ground reference for internal feedback and enable circuitry; must be connected to PGND at single PCB point near this pin to minimize ground shift noise
12 FB input Feedback voltage input for adjustable output voltage divider programming in adjustable versions; 500 mV nominal reference threshold
13 VOUT output DC/DC boost converter regulated output; provides fixed 5.0 V nominal output voltage with maximum output current up to 1000 mA
14 VOUT output DC/DC boost converter regulated output; provides fixed 5.0 V nominal output voltage with maximum output current up to 1000 mA
15 VOUT output DC/DC boost converter regulated output; provides fixed 5.0 V nominal output voltage with maximum output current up to 1000 mA
16 NC unconnected No internal connection
17 PowerPAD power_out Thermal dissipation metal pad connected to power ground (PGND); must be soldered to PCB for thermal performance and mechanical stability

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-16-EP
Category Power Management (PMIC)
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Total accuracy -3 3 % 5
Input voltage range VI 1.8 5.5 V 5
Oscillator frequency f 500 600 700 kHz 5
Frequency range for synchronization 500 700 kHz 5
Switch current limit 3600 4000 4500 mA VOUT= 5 V 5
VIL LBI voltage threshold VIL 490 500 510 mV VLBI voltage decreasing 5
Quiescent current into VBAT 10 25 µA IO = 0 mA, VEN = VBAT = 1.8 V, VOUT = 5 V 5
Quiescent current into VOUT 10 20 µA IO = 0 mA, VEN = VBAT = 1.8 V, VOUT = 5 V 5
Shutdown current 0.1 1 µA VEN= 0 V, VBAT = 2.4 V 5
LBI input current 0.01 0.1 µA EN = VBAT or GND 5
LBO output low voltage 0.04 0.4 V VO = 3.3 V, IOI = 100 µA 5
LBO output leakage current 0.01 0.1 µA VLBO= 7 V 5
EN, SYNC input current 0.01 0.1 µA Clamped on GND or VBAT 5
Supply voltage at VBAT VI 1.8 5.5 V 4
Operating ambient temperature range TA -40 85 °C 4
Operating virtual junction temperature range TJ -40 125 °C 4
Input voltage on LBI VI -0.3 3.6 V 4
Input voltage on SW, VOUT, LBO, VBAT, SYNC, EN, FB VI -0.3 7 V 4
Maximum junction temperature TJ -40 150 °C 4
Storage temperature range Tstg -65 150 °C 4
Electrostatic discharge, human body model V(ESD) -2000 2000 V Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins 4
Electrostatic discharge, charged device model V(ESD) -1000 1000 V Charged device model (CDM), per JEDEC JESD22-C101, all pins 4
Junction-to-ambient thermal resistance (PWP) RθJA 46.9 °C/W PWP (16-pin HTSSOP) package 4
Junction-to-case (top) thermal resistance (PWP) RθJC(top) 25.8 °C/W PWP (16-pin HTSSOP) package 4
Junction-to-board thermal resistance (PWP) RθJB 19.4 °C/W PWP (16-pin HTSSOP) package 4
Junction-to-top characterization parameter (PWP) ψJT 0.8 °C/W PWP (16-pin HTSSOP) package 4
Junction-to-board characterization parameter (PWP) ψJB 19.3 °C/W PWP (16-pin HTSSOP) package 4
Junction-to-case (bottom) thermal resistance (PWP) RθJC(bot) 2.2 °C/W PWP (16-pin HTSSOP) package 4

CAD (KiCad official)

  • Symbol: TPS61032PWPR
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: tps61032pwpr-etched.step / tps61032pwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps61032pwpr.step / tps61032pwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 09d8799e40eac542, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF