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TPS61030PWP
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Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS61030PWP
Texas Instruments · DC-DC Converters · HTSSOP-16-EP
TPS61030PWP from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | input | Boost and rectifying switch input. |
| 2 | SW | input | Boost and rectifying switch input. |
| 3 | PGND | power_in | Power ground. |
| 4 | PGND | power_in | Power ground. |
| 5 | PGND | power_in | Power ground. |
| 6 | VBAT | power_in | Supply voltage input, 1.8 V to 5.5 V per the recommended operating conditions. |
| 7 | LBI | input | Low battery comparator input, enabled with EN; absolute maximum input voltage is 3.6 V. |
| 8 | SYNC | input | Enables or disables power save mode (1/VBAT disables, 0/GND enables) and accepts a clock signal for synchronization. |
| 9 | EN | input | Enable input (1/VBAT enabled, 0/GND disabled). |
| 10 | LBO | output | Low battery comparator output, open drain. |
| 11 | GND | power_in | Control/logic ground. |
| 12 | FB | input | Voltage feedback input for the adjustable versions. |
| 13 | VOUT | power_out | DC/DC converter output. |
| 14 | VOUT | power_out | DC/DC converter output. |
| 15 | VOUT | power_out | DC/DC converter output. |
| 16 | NC | unconnected | Not connected internally. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management ICs |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
TPS61030PWP - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files:
tps61030pwp-etched.step/tps61030pwp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps61030pwp.step/tps61030pwp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
57d5d3de4e4bb9cf, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS61030PWP
**Texas Instruments** · DC-DC Converters · HTSSOP-16-EP
TPS61030PWP from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | input | Boost and rectifying switch input. |
| 2 | SW | input | Boost and rectifying switch input. |
| 3 | PGND | power_in | Power ground. |
| 4 | PGND | power_in | Power ground. |
| 5 | PGND | power_in | Power ground. |
| 6 | VBAT | power_in | Supply voltage input, 1.8 V to 5.5 V per the recommended operating conditions. |
| 7 | LBI | input | Low battery comparator input, enabled with EN; absolute maximum input voltage is 3.6 V. |
| 8 | SYNC | input | Enables or disables power save mode (1/VBAT disables, 0/GND enables) and accepts a clock signal for synchronization. |
| 9 | EN | input | Enable input (1/VBAT enabled, 0/GND disabled). |
| 10 | LBO | output | Low battery comparator output, open drain. |
| 11 | GND | power_in | Control/logic ground. |
| 12 | FB | input | Voltage feedback input for the adjustable versions. |
| 13 | VOUT | power_out | DC/DC converter output. |
| 14 | VOUT | power_out | DC/DC converter output. |
| 15 | VOUT | power_out | DC/DC converter output. |
| 16 | NC | unconnected | Not connected internally. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management ICs |
| Pins | 17 |
## CAD (KiCad official)
- Symbol: `TPS61030PWP`
- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`
- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files: `tps61030pwp-etched.step` / `tps61030pwp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps61030pwp.step` / `tps61030pwp.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps61030pwp.pdf) (32 pp, sha256 `57d5d3de4e4bb9cf`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps61030pwp-datasheet.pdf)