# TPS60212DGSR

**Texas Instruments** · DC-DC Converters · VSSOP-10-0.5mm

TPS60212DGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LBI/GND | input | Low-battery detector input on the TPS60212; a low-battery warning is generated at LBO when the voltage on LBI drops below the 1.18-V threshold, and LBI should be tied to GND or VBAT if the detector is not used. |
| 2 | GND | power_in | Ground reference for the device. |
| 3 | C1− | passive | Negative terminal of flying capacitor C1. |
| 4 | C1+ | passive | Positive terminal of flying capacitor C1. |
| 5 | OUT | power_out | Regulated 3.3-V power output, bypassed to GND with the output filter capacitor Co. |
| 6 | C2+ | passive | Positive terminal of flying capacitor C2. |
| 7 | IN | power_in | Supply input, from 1.8 V to 3.6 V, to be bypassed to GND with a capacitor of at least 2.2 µF. |
| 8 | C2− | passive | Negative terminal of flying capacitor C2. |
| 9 | SNOOZE | input | Mode control: low selects snooze mode (about 2 µA, output held at 3.3 V ±6%, load limited to 2 mA), high selects normal operation, and an external clock applied here synchronizes the charge pump. |
| 10 | LBO/PG | output | Open-drain low-battery output on the TPS60212, pulled low when LBI is below 1.18 V; a pullup should go to OUT or to a logic rail below 3.6 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Power Supply Chip |
| Pins | 10 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| V(LBI) LBI trip voltage | V(LBI) | 1.13 | 1.18 | 1.23 | V | VI = 1.6 V to 2.2 V, Tc = 0°C to 70°C | 8 |
| LBI input current | II(LBI) |  | 20 | 100 | nA | V(LBI) = 1.3 V | 8 |
| LBO leakage current | Ilkg(LBO) |  | 0.01 | 0.1 | µA | V(LBI) = 1.3 V, V(LBO) = 3.3 V | 8 |
| Output voltage (1.8 V < VI < 2 V) | VO | 3.17 | 3.3 | 3.43 | V | 1.8 V < VI < 2 V, 0 < IO < 0.5 × IO(MAX) | 8 |
| Output voltage (2 V < VI < 3.3 V) | VO | 3.17 | 3.3 | 3.43 | V | 2 V < VI < 3.3 V, 0 < IO < IO(MAX) | 8 |
| Output voltage (3.3 V < VI < 3.6 V) | VO | 3.17 | 3.3 | 3.47 | V | 3.3 V < VI < 3.6 V, 0 < IO < IO(MAX) | 8 |
| Output voltage in snooze mode | VO | 3.1 | 3.3 | 3.47 | V | SNOOZE = GND, 1.8 V < VI < 3.6 V, IO < 2 mA | 8 |
| Output voltage ripple | VPP |  |  | 5 | mVPP | IO = IO(MAX) | 8 |
| Quiescent current (no-load input current) | I(Q) |  | 35 | 70 | µA | IO = 0 mA, VI = 1.8 V to 3.6 V | 8 |
| Quiescent current in snooze mode | I(Q) |  | 2 | 5 | µA | SNOOZE = GND, IO = 0 mA | 8 |
| Internal switching frequency | f(OSC) | 200 | 300 | 400 | kHz |  | 8 |
| External clock signal frequency | f(SYNC) | 400 | 600 | 800 | kHz |  | 8 |
| External clock signal duty cycle |  | 30 |  | 70 | % |  | 8 |
| SNOOZE input leakage current | Ilkg |  | 0.01 | 0.1 | µA | SNOOZE = GND or VI | 8 |
| Power rating at TA = 70°C (DGS) |  |  | 178 |  | mW | TA = 70°C | 7 |
| Power rating at TA = 85°C (DGS) |  |  | 136 |  | mW | TA = 85°C | 7 |
| Input voltage range | VI | 1.6 |  | 3.6 | V |  | 7 |
| Operating junction temperature | TJ | -40 |  | 125 | °C |  | 7 |
| Voltage range IN, OUT, SNOOZE, LBI, LBO, PG to GND |  | -0.3 |  | 3.6 | V |  | 7 |
| Continuous output current (TPS60212, TPS60213) |  |  |  | 75 | mA |  | 7 |
| Storage temperature range | Tstg | -55 |  | 150 | °C |  | 7 |
| Maximum junction temperature | TJ |  |  | 150 | °C |  | 7 |
| Thermal resistance junction to ambient (DGS package) | RTH−JA |  | 294 |  | °C/W | DGS package | 7 |
| Power rating, DGS package |  |  | 424 |  | mW | TA ≤ 25°C | 7 |
| Derating factor above TA = 25°C (DGS) |  |  | 3.4 |  | mW/C | Above TA = 25°C | 7 |
| Input capacitor | Ci |  | 2.2 |  | µF |  | 7 |
| Flying capacitors | C1, C2 |  | 1 |  | µF |  | 7 |
| Output capacitor | Co |  | 2.2 |  | µF |  | 7 |
| Maximum continuous output current (TPS60212 and TPS60213) | IO(MAX) |  | 50 |  | mA | VI = 2 V | 8 |
| Output voltage (1.6 V < VI < 1.8 V) | VO | 3 |  |  | V | 1.6 V < VI < 1.8 V, 0 < IO < 0.25 × IO(MAX) | 8 |
| LBI trip voltage hysteresis |  |  | 10 |  | mV | For rising voltage at LBI | 8 |
| LBO output voltage low | VO(LBO) |  | 0.4 |  | V | V(LBI) = 0 V, I(LBO) = 1 mA | 8 |
| Output load regulation (1 mA < IO < IO(MAX)) |  |  | 0.015 |  | %/mA | VI = 2.4 V, 1 mA < IO < IO(MAX), TC = 25°C | 8 |
| Output load regulation (10 mA < IO < IO(MAX)) |  |  | 0.008 |  | %/mA | VI = 2.4 V, 10 mA < IO < IO(MAX), TC = 25°C | 8 |
| Output line regulation |  |  | 0.28 |  | %V | 2 V < VI < 3.3 V, IO = 0.5 x IO(MAX), TA = 25°C | 8 |
| Short circuit current | I(SC) |  | 60 |  | mA | VI = 2.4 V, VO = 0 V | 8 |
| LinSkip current threshold |  |  | 7 |  | mA | VI = 2 V to 3 V | 8 |

## CAD (KiCad official)

- Symbol: `TPS60212DGSR`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files: `tps60212dgsr-etched.step` / `tps60212dgsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps60212dgsr.step` / `tps60212dgsr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps60210) (28 pp, sha256 `4cdd47bb12a89a6c`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps60212dgsr-datasheet.pdf)