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TPS60201DGS
Public Made by Adomby adom
Texas Instruments DC-DC Converters, VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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|---|---|
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| README.md | 12d ago |
| tps60201dgs-etched.glb | 18d ago |
| tps60201dgs-etched.step | 18d ago |
| tps60201dgs-hero.glb | 17d ago |
| tps60201dgs-hero.overlay.json | 18d ago |
| tps60201dgs.glb | 18d ago |
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| tps60201dgs.step | 18d ago |
TPS60201DGS
Texas Instruments · DC-DC Converters · VSSOP-10-0.5mm
TPS60201DGS from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin for the device; the datasheet states that on TPS60201 the LBI function is not used and LBI must be connected to this GND pin. |
| 2 | GND | power_in | Ground pin for the device. |
| 3 | C1- | passive | Negative terminal of the flying capacitor C1, which uses a 1 µF flying capacitor per the recommended operating conditions. |
| 4 | C1+ | passive | Positive terminal of the flying capacitor C1, which uses a 1 µF flying capacitor per the recommended operating conditions. |
| 5 | OUT | power_out | Regulated 3.3-V power output; bypass OUT to GND with the output filter capacitor CO (2.2 µF recommended). |
| 6 | C2+ | passive | Positive terminal of the flying capacitor C2. |
| 7 | IN | power_in | Supply input with a recommended range of 1.6 V to 3.6 V; bypass IN to GND with a capacitor of the same size as CO. |
| 8 | C2- | passive | Negative terminal of the flying capacitor C2. |
| 9 | EN | input | Device-enable input: EN low disables the device and discharges the output capacitor, EN high runs from the internal oscillator, and an applied external clock puts the device in Sync-Mode. |
| 10 | PG | output | Open-drain power-good output that goes active high when OUT reaches about 90% of its nominal value and requires a pullup to OUT or to a logic rail lower than 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Power Supply Chip |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum continuous output current | IO(MAX) | 100 | mA | TPS60201, VI = 2 V | 6 | ||
| Output voltage | VO | 3 | V | 1.6 V < VI < 1.8 V, 0 < IO < 0.25 × IO(MAX) | 6 | ||
| Output voltage | VO | 3.17 | 3.43 | V | 1.8 V < VI < 2 V, 0 < IO < 0.5 × IO(MAX) | 6 | |
| Output voltage | VO | 3.17 | 3.47 | V | 3.3 V < VI < 3.6 V, 0 < IO < IO(MAX) | 6 | |
| Output voltage ripple | VPP | 5 | mVPP | IO = IO(MAX) | 6 | ||
| Quiescent current (no-load input current) | I(Q) | 35 | 70 | µA | IO = 0 mA, VI = 1.8 V to 3.6 V | 6 | |
| Shutdown supply current | I(SD) | 0.05 | 1 | µA | EN = 0 V | 6 | |
| Internal switching frequency | f(OSC) | 200 | 300 | 400 | kHz | 6 | |
| External clock signal frequency | f(SYNC) | 400 | 600 | 800 | kHz | 6 | |
| External clock signal duty cycle | 30 | 70 | % | 6 | |||
| EN input leakage current | Ilkg(EN) | 0.01 | 0.1 | µA | EN = 0 V or VI | 6 | |
| Power-good leakage current | Ilkg(PG) | 0.01 | 0.1 | µA | VO = 3.3 V, V(PG) = 3.3 V | 6 | |
| Power-good output voltage low | VO(PG) | 0.4 | V | VO = 0 V, I(PG) = 1 mA | 6 | ||
| Voltage IN, OUT, EN, LBI, LBO, PG to GND | -0.3 | 3.6 | V | 5 | |||
| Voltage C1+, C2+ to GND | -0.3 | V | 5 | ||||
| Voltage C1–, C2– to GND | -0.3 | V | 5 | ||||
| Continuous total power dissipation | 424 | mW | TA ≤ 25°C power rating | 5 | |||
| Continuous total power dissipation | 187 | mW | TA = 70°C power rating | 5 | |||
| Continuous total power dissipation | 136 | mW | TA = 85°C power rating | 5 | |||
| Continuous output current | 150 | mA | TPS60201 | 5 | |||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | Tstg | -55 | 150 | °C | 5 | ||
| Input voltage | VI | 1.6 | 3.6 | V | 5 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 5 | ||
| Vhys(PG) Power-good trip voltage hysteresis | Vhys(PG) | 1 | % | VO decreasing, TC = 0°C to 70°C | 6 | ||
| Output capacitor auto discharge time | 0.6 | ms | EN is set from VI to GND, time until VO < 0.5 V | 6 | |||
| Output resistance in shutdown | 70 | Ω | EN = 0 V | 6 | |||
| LinSkip threshold | 7 | mA | VI = 2.2 V | 6 | |||
| Output load regulation | 0.01 | % mA | 10 mA < IO < IO(MAX), TA = 25°C | 6 | |||
| Output line regulation | 0.6 | % V | 2 V < VI < 3.3 V, IO = 0.5 × IO(MAX), TA = 25°C | 6 | |||
| Short-circuit current | I(SC) | 60 | mA | VI = 2.4 V, VO = 0 V | 6 | ||
| Input capacitor | Ci | 2.2 | µF | 5 | |||
| Flying capacitors | C1, C2 | 1 | µF | 5 | |||
| Output capacitor | CO | 2.2 | µF | 5 | |||
| Junction-to-ambient thermal resistance | RθJA | 158.1 | °C/W | DGS (MSOP) 10 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 49.3 | °C/W | DGS (MSOP) 10 pins | 5 | ||
| Junction-to-board thermal resistance | RθJB | 78.1 | °C/W | DGS (MSOP) 10 pins | 5 | ||
| Junction-to-top characterization parameter | ψJT | 4.7 | °C/W | DGS (MSOP) 10 pins | 5 | ||
| Junction-to-board characterization parameter | ψJB | 76.8 | °C/W | DGS (MSOP) 10 pins | 5 |
CAD (KiCad official)
- Symbol:
TPS60201DGS - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files:
tps60201dgs-etched.step/tps60201dgs-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps60201dgs.step/tps60201dgs.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
29c132d0f3880a8c, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).