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TPS57112CQRTERQ1

Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)

TPS57112CQRTERQ1 from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input supply voltage pin; the datasheet specifies an input range of 2.95 V to 6 V.
2 VIN power_in Input supply voltage pin; the datasheet specifies an input range of 2.95 V to 6 V.
3 GND power_in Power ground; connect electrically to the thermal pad directly under the IC.
4 GND power_in Power ground; connect electrically to the thermal pad directly under the IC.
5 AGND power_in Analog ground; connect electrically to GND close to the device.
6 VSENSE input Inverting input of the transconductance (gm) error amplifier, regulated to the 0.8 V internal reference.
7 COMP output Error amplifier output and input to the output-switch current comparator; frequency-compensation components connect to this pin.
8 RT/CLK input Resistor-timing or external-clock input; a clock square wave needs an on-time of at least 75 ns and a synchronization range of 300 kHz to 2000 kHz.
9 SS/TR input Slow-start and tracking pin; an external capacitor sets the output-voltage rise time, and the pin is also used for tracking.
10 PH output Source of the internal high-side power MOSFET and drain of the internal low-side (synchronous) rectifier MOSFET; absolute maximum PH voltage is -0.6 V to 7 V (-2 V to 10 V for 10-ns transients).
11 PH output Source of the internal high-side power MOSFET and drain of the internal low-side (synchronous) rectifier MOSFET; absolute maximum PH voltage is -0.6 V to 7 V (-2 V to 10 V for 10-ns transients).
12 PH output Source of the internal high-side power MOSFET and drain of the internal low-side (synchronous) rectifier MOSFET; absolute maximum PH voltage is -0.6 V to 7 V (-2 V to 10 V for 10-ns transients).
13 BOOT output Requires a bootstrap capacitor between BOOT and PH; if the voltage on this capacitor falls below the BOOT UVLO minimum, the output is forced off until the capacitor recharges.
14 PWRGD output Open-drain power-good output that asserts low on thermal shutdown, overcurrent, overvoltage, undervoltage, or EN shutdown; the datasheet recommends a pullup of 1 kΩ to 100 kΩ to a source of 6 V or less.
15 EN input Enable pin with internal pullup current source; pull below 1.2 V to disable and float to enable, and external resistors can set the UVLO threshold.
16 VIN power_in Input supply voltage pin; the datasheet specifies an input range of 2.95 V to 6 V.
17 Thermal Pad passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS57112CQRTERQ1
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps57112cqrterq1-etched.step / tps57112cqrterq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps57112cqrterq1.step / tps57112cqrterq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 f3d209ed52d6da70, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF