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TPS566242DRLR

Public Made by Adom

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Texas Instruments DC-DC Converters, SOT-563. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Datasheet

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Contents

README

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TPS566242DRLR

Texas Instruments · DC-DC Converters · SOT-563

TPS566242DRLR from Texas Instruments, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input voltage supply pin operating in the 3 V to 16 V range.
2 SW output Switch node connecting high-side and low-side MOSFETs; operating voltage range −1 V to 16 V.
3 GND power_in Ground reference for power stage and control circuits; source terminal of low-side MOSFET.
4 AGND power_in Analog ground of internal circuitry that must be connected to the GND plane.
5 EN input Enable input to converter with 1.18 V typical threshold voltage for enabling operation.
6 FB input Feedback input for output voltage regulation accepting −0.1 V to 5.5 V with 600 mV reference voltage.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-563
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VIN 3 16 V 5
UVLO VIN undervoltage lockout Wake-up VIN voltage UVLO 2.75 2.92 3 V 5
UVLO VIN undervoltage lockout Shutdown VIN voltage UVLO 2.6 2.72 2.9 V 5
FB voltage VREF 594 600 606 mV TJ = 25°C 5
FB voltage VREF 591 600 609 mV TJ = –40°C to 125°C 5
EN threshold high level VEN(ON) 1.07 1.18 1.33 V 5
EN threshold low level VEN(OFF) 0.95 1 1.2 V 5
OVP trip threshold VOVP 115 120 125 % 5
UVP trip threshold VUVP 55 60 65 % 5
Overcurrent threshold IOCL_LS 6 7.4 9 A Valley current setpoint 5
Negative overcurrent threshold INOCL 2 3.4 4.2 A 5
Input voltage VIN VIN -0.3 18 V 4
Input voltage FB, EN FB, EN -0.3 6 V 4
Input voltage AGND, PGND AGND, PGND -0.3 0.3 V 4
Output voltage SW SW -2 18 V 4
Output voltage SW (< 20 ns) SW -6.5 20 V 4
Operating junction temperature range TJ -40 150 °C 4
Storage temperature Tstg -55 150 °C 4
Input voltage VIN VIN 3 16 V 4
Input voltage FB, EN FB, EN -0.1 5.5 V 4
Input voltage AGND, PGND AGND, PGND -0.1 0.1 V 4
Output voltage SW SW -1 16 V 4
Output voltage SW (< 20 ns) SW -6 18 V 4
Output current IO 0 6 A 4
Operating junction temperature TJ -40 125 °C 4
Storage temperature Tstg -40 150 °C 4
VIN supply current, ECO version IVIN 120 µA No load, VEN = 5 V, VFB = 0.65 V, non-switching, ECO version 5
VIN shutdown current IINSDN 2 µA No load, VEN = 0 V 5
UVLO VIN undervoltage lockout Hysteresis VIN voltage UVLO 200 mV 5
High-side MOSFET RDS(ON) RDS(ON)HI 27.7 mΩ TJ = 25°C, VVIN ≥ 5 V 5
High-side MOSFET RDS(ON) RDS(ON)HI 29.6 mΩ TJ = 25°C, VVIN = 3 V 5
Low-side MOSFET RDS(ON) RDS(ON)LO 14.8 mΩ TJ = 25°C, VVIN ≥ 5 V 5
Low-side MOSFET RDS(ON) RDS(ON)LO 15.8 mΩ TJ = 25°C, VVIN = 3 V 5
Switching frequency FSW 600 kHz TJ = 25°C, VVOUT = 3.3 V 5
Minimum on time TON(MIN) 50 ns TJ = 25°C 5
Minimum off time TOFF(MIN) 100 ns VFB = 0.5 V 5
EN hysteresis VENHYS 180 mV 5
EN pulldown resistor REN1 2 MΩ 5
Internal soft-start time tSS 1.39 ms 5
OVP prop deglitch tOVPDLY 24 µs TJ = 25°C 5
UVP prop deglitch tUVPDLY 256 µs 5
Output hiccup delay relative to SS time UVP detect tUVPDEL 256 µs 5
Output hiccup enable delay relative to SS time UVP detect tUVPEN 13 ms 5
OTP trip threshold TOTP 155 °C 5
OTP hysteresis TOTPHSY 20 °C 6
Junction-to-ambient thermal resistance RθJA 131.1 °C/W 4
Junction-to-ambient thermal resistance on EVM board RθJA_effective 51 °C/W Tested on TPS566242EVM board, VIN = 12 V, VOUT = 5 V, IOUT = 6 A, TA = 25°C 4
Junction-to-case (top) thermal resistance RθJC(top) 45.6 °C/W 4
Junction-to-board thermal resistance RθJB 16.4 °C/W 4
Junction-to-top characterization parameter ΨJT 0.8 °C/W 4
Junction-to-board characterization parameter YJB 16.1 °C/W 4

CAD (KiCad official)

  • Symbol: TPS566242DRLR
  • Footprint: Package_TO_SOT_SMD:SOT-563
  • 3D model: SOT-563 (KiCad packages3D, STEP)
  • 3D model files: tps566242drlr-etched.step / tps566242drlr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps566242drlr.step / tps566242drlr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 b31131c5f1ee2986, retrieved 2026-09-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF