component
TPS56520PWPR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+58@@ -0,0 +1,58 @@+# TPS56520PWPR++**Texas Instruments** · DC-DC Converters · HTSSOP-20-EP++TPS56520PWPR from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | EN | input | Enable input that enables the converter when pulled high (absolute maximum -0.3 V to 20 V). |+| 2 | SDA | bidirectional | I2C-compatible data I/O terminal (absolute maximum -0.3 V to 3.6 V). |+| 3 | SCL | bidirectional | I2C-compatible clock I/O terminal (absolute maximum -0.3 V to 3.6 V). |+| 4 | A1 | input | Chip address programming input, upper bit (absolute maximum -0.3 V to 6.5 V). |+| 5 | A0 | input | Chip address programming input, lower bit (absolute maximum -0.3 V to 6.5 V). |+| 6 | VIN | power_in | Supply input for the 5.5 V linear regulator, operating range 4.5 V to 17 V. |+| 7 | PVIN | power_in | Power input connected to the high-side MOSFET drains, operating range 4.5 V to 17 V; pins 7 and 8 are tied together. |+| 8 | PVIN | power_in | Power input connected to the high-side MOSFET drains, operating range 4.5 V to 17 V; pins 7 and 8 are tied together. |+| 9 | PGND | power_in | Ground return for the low-side MOSFETs and input of the current comparator; pins 9 and 10 are tied together. |+| 10 | PGND | power_in | Ground return for the low-side MOSFETs and input of the current comparator; pins 9 and 10 are tied together. |+| 11 | SW | power_out | Switch node connection for the high-side and low-side NFETs and input of the current comparator (absolute maximum -2 V to 20 V). |+| 12 | SW | power_out | Switch node connection for the high-side and low-side NFETs and input of the current comparator (absolute maximum -2 V to 20 V). |+| 13 | SW | power_out | Switch node connection for the high-side and low-side NFETs and input of the current comparator (absolute maximum -2 V to 20 V). |+| 14 | VBST | power_in | Supply input for the high-side NFET gate drive; connect a 0.1 µF ceramic capacitor between VBST and SW, with an internal diode to VREG5 (absolute maximum 26 V). |+| 15 | PGOOD | output | Open-drain power-good output that is low when the output voltage is out of regulation (sink current up to 5 mA). |+| 16 | VREG5 | power_out | 5.5 V linear regulator output, active when EN is high; bypass to GND with at least 2.0 µF ceramic and connect no other circuitry. |+| 17 | GND | power_in | Signal ground; connect the sensitive SS and VFB returns to GND at a single point. |+| 18 | SS | output | Soft-start programming terminal; connect a capacitor from SS to GND to set the soft-start time. |+| 19 | VOUT | input | Connection to the converter output voltage (absolute maximum -0.3 V to 3.6 V). |+| 20 | VFB | input | D-CAP2 feedback input; connect to the output voltage through a resistor divider (absolute maximum -0.3 V to 3.6 V). |+| 21 | EP | power_in | Exposed thermal pad on the back side that must be soldered for dissipation and connected to GND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-20-EP |+| Category | Power Management (PMIC) |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `TPS56520PWPR`+- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`+- 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `tps56520pwpr-etched.step` / `tps56520pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps56520pwpr.step` / `tps56520pwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps56920) (52 pp, sha256 `1829a4ee99bbd0ca`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps56520pwpr-datasheet.pdf)
page.jsonadded+278@@ -0,0 +1,278 @@+{+ "slug": "tps56520pwpr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps56520pwpr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps56520pwpr.kicad_sym",+ "tps56520pwpr.kicad_mod",+ "tps56520pwpr.glb",+ "tps56520pwpr.step",+ "tps56520pwpr.lbr",+ "docs/hero.png",+ "docs/tps56520pwpr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps56520pwpr-hero.glb",+ "tps56520pwpr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS56520PWPR",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-20-EP",+ "pin_count": 21,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps56920",+ "parts": {+ "symbol": "tps56520pwpr.kicad_sym",+ "footprint": "tps56520pwpr.kicad_mod",+ "model_3d": "tps56520pwpr-hero.glb",+ "model_3d_plain": "tps56520pwpr.glb",+ "model_3d_step": "tps56520pwpr-etched.step",+ "model_3d_step_plain": "tps56520pwpr.step",+ "lbr": "tps56520pwpr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2071363",+ "digikey": "296-37830-2-ND",+ "mouser": "595-TPS56520PWPR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T19:24:43Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-37830-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS56520PWPR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "EN",+ "type": "input",+ "description": "Enable input that enables the converter when pulled high (absolute maximum -0.3 V to 20 V)."+ },+ {+ "number": "2",+ "name": "SDA",+ "type": "bidirectional",+ "description": "I2C-compatible data I/O terminal (absolute maximum -0.3 V to 3.6 V)."+ },+ {+ "number": "3",+ "name": "SCL",+ "type": "bidirectional",+ "description": "I2C-compatible clock I/O terminal (absolute maximum -0.3 V to 3.6 V)."+ },+ {+ "number": "4",+ "name": "A1",+ "type": "input",+ "description": "Chip address programming input, upper bit (absolute maximum -0.3 V to 6.5 V)."+ },+ {+ "number": "5",+ "name": "A0",+ "type": "input",+ "description": "Chip address programming input, lower bit (absolute maximum -0.3 V to 6.5 V)."+ },+ {+ "number": "6",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply input for the 5.5 V linear regulator, operating range 4.5 V to 17 V."+ },+ {+ "number": "7",+ "name": "PVIN",+ "type": "power_in",+ "description": "Power input connected to the high-side MOSFET drains, operating range 4.5 V to 17 V; pins 7 and 8 are tied together."+ },+ {+ "number": "8",+ "name": "PVIN",+ "type": "power_in",+ "description": "Power input connected to the high-side MOSFET drains, operating range 4.5 V to 17 V; pins 7 and 8 are tied together."+ },+ {+ "number": "9",+ "name": "PGND",+ "type": "power_in",+ "description": "Ground return for the low-side MOSFETs and input of the current comparator; pins 9 and 10 are tied together."+ },+ {+ "number": "10",+ "name": "PGND",+ "type": "power_in",+ "description": "Ground return for the low-side MOSFETs and input of the current comparator; pins 9 and 10 are tied together."+ },+ {+ "number": "11",+ "name": "SW",+ "type": "power_out",+ "description": "Switch node connection for the high-side and low-side NFETs and input of the current comparator (absolute maximum -2 V to 20 V)."+ },+ {+ "number": "12",+ "name": "SW",+ "type": "power_out",+ "description": "Switch node connection for the high-side and low-side NFETs and input of the current comparator (absolute maximum -2 V to 20 V)."+ },+ {+ "number": "13",+ "name": "SW",+ "type": "power_out",+ "description": "Switch node connection for the high-side and low-side NFETs and input of the current comparator (absolute maximum -2 V to 20 V)."+ },+ {+ "number": "14",+ "name": "VBST",+ "type": "power_in",+ "description": "Supply input for the high-side NFET gate drive; connect a 0.1 µF ceramic capacitor between VBST and SW, with an internal diode to VREG5 (absolute maximum 26 V)."+ },+ {+ "number": "15",+ "name": "PGOOD",+ "type": "output",+ "description": "Open-drain power-good output that is low when the output voltage is out of regulation (sink current up to 5 mA)."+ },+ {+ "number": "16",+ "name": "VREG5",+ "type": "power_out",+ "description": "5.5 V linear regulator output, active when EN is high; bypass to GND with at least 2.0 µF ceramic and connect no other circuitry."+ },+ {+ "number": "17",+ "name": "GND",+ "type": "power_in",+ "description": "Signal ground; connect the sensitive SS and VFB returns to GND at a single point."+ },+ {+ "number": "18",+ "name": "SS",+ "type": "output",+ "description": "Soft-start programming terminal; connect a capacitor from SS to GND to set the soft-start time."+ },+ {+ "number": "19",+ "name": "VOUT",+ "type": "input",+ "description": "Connection to the converter output voltage (absolute maximum -0.3 V to 3.6 V)."+ },+ {+ "number": "20",+ "name": "VFB",+ "type": "input",+ "description": "D-CAP2 feedback input; connect to the output voltage through a resistor divider (absolute maximum -0.3 V to 3.6 V)."+ },+ {+ "number": "21",+ "name": "EP",+ "type": "power_in",+ "description": "Exposed thermal pad on the back side that must be soldered for dissipation and connected to GND."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The pin table lists the exposed thermal pad with no number. The number 21 comes from the 'PWRPAD 21'; The datasheet lists PGND and GND as I/O. They are typed power_in here per the ground convention; the; The datasheet lists PVIN and VBST as I/O or input. They are typed power_in here as supply pins."+ ],+ "pages_sent": 11,+ "cost_usd": 0.0811,+ "at": "2026-10-08T19:23:44"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps56920",+ "pages": 52,+ "sha256": "1829a4ee99bbd0ca",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps56520pwpr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.41,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "1335f6c13a3d72b1069a4a79cdba2dcd81ec9430e51a00b1458796ffe1b5c2eb",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps56520pwpr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.41,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "458e535fa7579b74c2bc8e188317edfe549666f0e0ca61c2f7f3b1d911659753",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}