component
TPS563219ADDFT
Public Made by Adomby adom
Texas Instruments DC-DC Converters, TSOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS563219ADDFT
Texas Instruments · DC-DC Converters · TSOT-23-8
TPS563219ADDFT from Texas Instruments, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin that is the source terminal of the low-side power NFET and the ground for the controller circuit; connect the sensitive VFB to this GND at a single point. |
| 2 | SW | power_out | Switch node connecting the high-side NFET and low-side NFET; absolute maximum is -2 V to 19 V (-3.5 V to 21 V for 10 ns transients). |
| 3 | VIN | power_in | Input voltage supply pin and the drain terminal of the high-side power NFET; recommended supply range is 4.5 V to 17 V. |
| 4 | PG | output | Power good open-drain output; absolute maximum is -0.3 V to 6.5 V. |
| 5 | SS | passive | Soft-start control pin; an external capacitor should be connected from this pin to GND. |
| 6 | VFB | input | Converter feedback input that connects to the output voltage through a feedback resistor divider; recommended range is -0.1 V to 5.5 V. |
| 7 | EN | input | Enable input, active high, that must be pulled up to enable the device; recommended range is -0.1 V to 17 V. |
| 8 | VBST | power_in | Supply input for the high-side NFET gate drive circuit; connect a 0.1 µF capacitor between VBST and SW; recommended VBST vs SW is -0.1 V to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSOT-23-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS563219ADDFT - Footprint:
Package_TO_SOT_SMD:TSOT-23-8 - 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
tps563219addft-etched.step/tps563219addft-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps563219addft.step/tps563219addft.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
a7b77680c2ce6538, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).