component
TPS563210ADDFR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, TSOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownTPS563210ADDFR
Texas Instruments · DC-DC Converters · TSOT-23-8
TPS563210ADDFR from Texas Instruments, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin that is the source terminal of the low-side power NFET and the ground for the controller circuit, and the VFB-sensitive ground must be connected to this GND at a single point. |
| 2 | SW | output | Switch node connection between the high-side NFET and the low-side NFET; recommended SW range is -1.8 V to 17 V (DC), per the Recommended Operating Conditions. |
| 3 | VIN | power_in | Input voltage supply pin and drain terminal of the high-side power NFET, with a recommended supply range of 4.5 V to 17 V. |
| 4 | PG | output | Power-good open-drain output; absolute maximum rating for PG is -0.3 V to 6.5 V. |
| 5 | SS | passive | Soft-start control pin, where an external capacitor connected to GND sets the soft-start time; recommended SS range is -0.1 V to 5 V. |
| 6 | VFB | input | Converter feedback input that connects to the output voltage through a feedback resistor divider; recommended VFB range is -0.1 V to 5.5 V. |
| 7 | EN | input | Active-high enable input that must be pulled up to enable the device, with a recommended range of -0.1 V to 17 V. |
| 8 | VBST | power_in | Supply input for the high-side NFET gate-drive circuit, which requires a 0.1 µF capacitor between VBST and SW; recommended VBST(vs SW) is -0.1 V to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSOT-23-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating, non-switching supply current | IVIN | 190 | 290 | µA | VIN current, TA = 25°C, EN = 5V, VFB = 0.8 V | 5 | |
| Shutdown supply current | IVINSDN | 3 | 10 | µA | VIN current, TA = 25°C, EN = 0 V | 5 | |
| EN pin resistance to GND | REN | 225 | 450 | 900 | kΩ | VEN = 12 V | 5 |
| VFB threshold voltage | VFBTH | 758 | 765 | 772 | mV | TA = 25°C, VO = 1.05 V | 5 |
| VFB threshold voltage | VFBTH | 753 | 777 | mV | TA = 0°C to 85°C, VO = 1.05 V | 5 | |
| VFB threshold voltage | VFBTH | 751 | 779 | mV | TA = -40°C to 85°C, VO = 1.05 V | 5 | |
| VFB input current | IVFB | -0.1 | 0 | 0.1 | µA | VFB = 0.8 V, TA = 25°C | 5 |
| Current limit | IOCL | 3.5 | 4.2 | 5.3 | A | DC current, VOUT = 1.05 V, L1 = 1.5 µH | 5 |
| SS charge current | ISS | 4.2 | 6 | 7.8 | µA | VSS = 1.2 V | 5 |
| PG threshold | VTHPG | 85 | 90 | 95 | % | VFB rising (Good) | 5 |
| PG sink current | IPG | 0.5 | 1 | mA | PG = 0.5 V | 5 | |
| UVLO wake-up VIN voltage | UVLO | 3.45 | 3.75 | 4.05 | V | Wake up VIN voltage | 5 |
| UVLO hysteresis VIN voltage | UVLO | 0.13 | 0.32 | 0.55 | V | Hysteresis VIN voltage | 5 |
| Minimum off time | tOFF(MIN) | 260 | 310 | ns | TA = 25°C, VFB = 0.5 V | 5 | |
| VIN supply input voltage range | VIN | 4.5 | 17 | V | 4 | ||
| Input voltage range VBST | VI | -0.1 | 23 | V | 4 | ||
| Input voltage range VBST (10 ns transient) | VI | -0.1 | 26 | V | 4 | ||
| Input voltage range VBST (vs SW) | VI | -0.1 | 6 | V | 4 | ||
| Input voltage range EN | VI | -0.1 | 17 | V | 4 | ||
| Input voltage range VFB, PG | VI | -0.1 | 5.5 | V | 4 | ||
| Input voltage range SS | VI | -0.1 | 5 | V | 4 | ||
| Input voltage range SW | VI | -1.8 | 17 | V | 4 | ||
| Input voltage range SW (10 ns transient) | VI | -3.5 | 20 | V | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 4 | ||
| Input voltage range VIN, EN | -0.3 | 19 | V | 4 | |||
| Input voltage range VBST | -0.3 | 25 | V | 4 | |||
| Input voltage range VBST (10 ns transient) | -0.3 | 27.5 | V | 4 | |||
| Input voltage range VBST (vs SW) | -0.3 | 6.5 | V | 4 | |||
| Input voltage range VFB, PG | -0.3 | 6.5 | V | 4 | |||
| Input voltage range SS | -0.3 | 5.5 | V | 4 | |||
| Input voltage range SW | -2 | 19 | V | 4 | |||
| Input voltage range SW (10 ns transient) | -3.5 | 21 | V | 4 | |||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 87 | °C/W | DDF (8 pins), TPS563210A column | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 41.6 | °C/W | DDF (8 pins), TPS563210A column | 4 | ||
| Junction-to-board thermal resistance | RθJB | 14.6 | °C/W | DDF (8 pins), TPS563210A column | 4 |
CAD (KiCad official)
- Symbol:
TPS563210ADDFR - Footprint:
Package_TO_SOT_SMD:TSOT-23-8 - 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
tps563210addfr-etched.step/tps563210addfr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps563210addfr.step/tps563210addfr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
93ccf335d18255b9, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).