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TPS561243DRLR
Public Made by Adomby adom
TI(德州仪器) Global Sourcing Parts, SOT-563. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS561243DRLR
TI(德州仪器) · Global Sourcing Parts · SOT-563
TPS561243DRLR from TI(德州仪器), in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input voltage supply pin, operating range 4.2 V to 17 V with an absolute maximum of 19 V. |
| 2 | SW | output | Switch node connecting the high-side and low-side NFETs; recommended range is -1 V to 17 V (-6 V to 19 V for under 20 ns). |
| 3 | GND | power_in | Source terminal of the low-side power NFET and ground for the control circuitry; the sensitive FB network should connect to this GND at a single point. |
| 4 | BST | power_in | Supply input for the high-side NFET gate-drive circuit; a 0.1 µF capacitor must be connected between BST and SW, with a recommended range of -0.1 V to 23 V. |
| 5 | EN | input | Active-high enable input that must be pulled up to enable the device; the recommended maximum is 5.5 V, with a high threshold of 1.15 V to 1.28 V and a low threshold of 0.93 V to 1.05 V. |
| 6 | FB | input | Converter feedback input connected to the output through a resistor divider, referenced to 0.6 V, with a recommended range of -0.1 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TI(德州仪器) |
| Package | SOT-563 |
| Category | Global Sourcing Parts |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 输入电压 VIN (absolute maximum) | VIN | -0.3 | 19 | V | 4 | ||
| 输入电压 FB、EN (absolute maximum) | -0.3 | 6 | V | 4 | |||
| 输入电压 GND (absolute maximum) | -0.3 | 0.3 | V | 4 | |||
| 输出电压 BST (absolute maximum) | -0.3 | 25 | V | 4 | |||
| 输出电压 BST (absolute maximum) | -0.3 | 27 | V | < 20ns | 4 | ||
| 输出电压 SW (absolute maximum) | -2 | 19 | V | 4 | |||
| 输出电压 SW (absolute maximum) | -6.5 | 21 | V | < 20ns | 4 | ||
| 工作结温范围 TJ (absolute maximum) | TJ | -40 | 150 | °C | 4 | ||
| 贮存温度 Tstg (absolute maximum) | Tstg | -55 | 150 | °C | 4 | ||
| ESD 人体放电模型 HBM | V(ESD) | -2000 | 2000 | V | Human body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD 充电器件模型 CDM | V(ESD) | -500 | 500 | V | Charged device model, ANSI/ESDA/JEDEC JS-002 | 4 | |
| 输入电压 VIN (recommended operating) | VIN | 4.2 | 17 | V | 4 | ||
| 输入电压 FB、EN (recommended operating) | -0.1 | 5.5 | V | 4 | |||
| 输入电压 GND (recommended operating) | -0.1 | 0.1 | V | 4 | |||
| 输出电压 BST (recommended operating) | -0.1 | 23 | V | 4 | |||
| 输出电压 BST (recommended operating) | -0.1 | 25 | V | < 20ns | 4 | ||
| 输出电压 SW (recommended operating) | -1 | 17 | V | 4 | |||
| 输出电压 SW (recommended operating) | -6 | 19 | V | < 20ns | 4 | ||
| 输出电流 IO | IO | 0 | 1 | A | 4 | ||
| 工作结温 TJ (recommended operating) | TJ | -40 | 125 | °C | 4 | ||
| 贮存温度 Tstg (recommended operating) | Tstg | -40 | 150 | °C | 4 | ||
| 输入电压范围 VIN | VIN | 4.2 | 17 | V | 5 | ||
| UVLO VIN 唤醒电压 | 3.6 | 3.8 | 4 | V | 5 | ||
| UVLO VIN 关断电压 | 3.2 | 3.4 | 3.6 | V | 5 | ||
| FB 电压 (25°C) | VFB | 591 | 600 | 609 | mV | TJ = 25°C, Vin = 4.2V - 17V | 5 |
| FB 电压 (全温度范围) | VFB | 588 | 600 | 612 | mV | TJ = -40°C 至 125°C, Vin = 4.2V - 17V | 5 |
| 过流阈值 谷值电流设定点 | IOCL_LS | 1.2 | 2.8 | 3.6 | A | 谷值电流设定点 | 5 |
| 负过流阈值 谷值电流设定点 | INOCL | 1 | 1.8 | 2.5 | A | 谷值电流设定点 | 5 |
| EN 阈值高电平 | VEN(ON) | 1.15 | 1.2 | 1.28 | V | 5 | |
| EN 阈值低电平 | VEN(OFF) | 0.93 | 1 | 1.05 | V | 5 | |
| UVP 跳变阈值 | VUVP | 55 | 60 | 65 | % | 6 | |
| VIN 电源电流 (ECO 版本) | IVIN | 110 | µA | 无负载，VEN = 1.5V，非开关，ECO 版本 | 5 | ||
| VIN 关断电流 | IINSDN | 7 | µA | VEN = 0V | 5 | ||
| UVLO VIN 迟滞电压 | 400 | mV | 5 | ||||
| 高侧 MOSFET Rds(on) | RDS(ON)HI | 100 | mΩ | TJ = 25°C | 5 | ||
| 低侧 MOSFET Rds(on) | RDS(ON)LO | 55 | mΩ | TJ = 25°C | 5 | ||
| 开关频率 | FSW | 1280 | kHz | VOUT = 3.3V | 5 | ||
| 最短关断时间 | TOFF(MIN) | 100 | ns | VFB = 0.5V | 5 | ||
| 最短导通时间 | TON(MIN) | 55 | ns | 5 | |||
| EN 迟滞 | VENHYS | 200 | mV | 5 | |||
| EN 下拉电流 | IEN | 1 | uA | VEN = 1.5V | 6 | ||
| 内部软启动时间 | tSS | 1.4 | ms | VOUT 从 0 到目标值 | 6 | ||
| UVP 传播抗尖峰脉冲 | tUVPDLY | 256 | us | 6 | |||
| 连续断续模式开关时间 | tUVPON | 1.5 | ms | 硬短路，UVP 检测 | 6 | ||
| 连续断续模式非开关时间 | tUVPOFF | 13 | ms | 硬短路，UVP 检测 | 6 | ||
| OTP 跳变阈值 | TOTP | 155 | °C | 6 | |||
| OTP 迟滞 | TOTPHSY | 20 | °C | 6 | |||
| 结至环境热阻 RθJA | RθJA | 147.4 | °C/W | 5 | |||
| EVM 板结到环境热阻 RθJA_effective | RθJA_effective | 73 | °C/W | EVM 板，TA = 25°C | 5 | ||
| 结至外壳（顶部）热阻 RθJC(top) | RθJC(top) | 75.7 | °C/W | 5 | |||
| 结至电路板热阻 RθJB | RθJB | 32.2 | °C/W | 5 | |||
| 结至顶部特征参数 ΨJT | ΨJT | 2.1 | °C/W | 5 | |||
| 结至电路板特征参数 YJB | YJB | 31.8 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
TPS561243DRLR - Footprint:
Package_TO_SOT_SMD:SOT-563 - 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files:
tps561243drlr-etched.step/tps561243drlr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps561243drlr.step/tps561243drlr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TI(德州仪器) datasheet (26 pp, sha256
781a0e385b4d2221, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).