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TPS560430XDBVT
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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TPS560430XDBVT
Texas Instruments · DC-DC Converters · SOT-23-6
TPS560430XDBVT from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CB | passive | Bootstrap capacitor connection for the high-side FET gate driver. Connect a 100-nF high-quality ceramic capacitor from CB to SW to develop the boot supply that drives the internal high-side NMOS. |
| 2 | GND | power_in | Power ground. Internally connected to the source of the low-side FET. Tie to system ground and to the ground terminals of CIN and COUT; keep the path to CIN as short as possible. |
| 3 | FB | input | Feedback input to the converter's error amplifier. Connect the tap of an external resistor divider from VOUT to GND to program the output voltage (Vref = 0.8 V typical, ±1.5% over -40 to 125 °C). Never short FB to ground during operation. |
| 4 | EN | input | Precision enable input. High = converter on, Low = off; do not float. Can be tied directly to VIN, or driven from a resistor divider on VIN to implement an adjustable input UVLO threshold. |
| 5 | VIN | power_in | Supply input to the internal bias LDO and to the drain of the high-side FET. Operating range 4 V to 36 V. Connect the input bypass capacitor CIN directly between this pin and GND with minimum loop area. |
| 6 | SW | power_out | Switching node. Internally connected to the source of the high-side FET and the drain of the low-side FET. Connect to the power inductor; also serves as the low-side reference for the CB bootstrap capacitor. Delivers up to 600 mA continuous output current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Ordering variants
Same part, different packaging or reel option.
TPS560430XDBVTTPS560430XDBVRTPS560430XDBVTXFDBVTTPS560430XDBVTXFDBVRTPS560430XDBVTX3FDBVTTPS560430XDBVTX3FDBVRTPS560430XDBVTYDBVTTPS560430XDBVTYDBVRTPS560430XDBVTYFDBVTTPS560430XDBVTYFDBVR
CAD (KiCad official)
- Symbol:
TPS560430XDBVT - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
tps560430xdbvt-etched.step/tps560430xdbvt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps560430xdbvt.step/tps560430xdbvt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
f5d28f16b7ee0c6e, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS560430XDBVT
**Texas Instruments** · DC-DC Converters · SOT-23-6
TPS560430XDBVT from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CB | passive | Bootstrap capacitor connection for the high-side FET gate driver. Connect a 100-nF high-quality ceramic capacitor from CB to SW to develop the boot supply that drives the internal high-side NMOS. |
| 2 | GND | power_in | Power ground. Internally connected to the source of the low-side FET. Tie to system ground and to the ground terminals of CIN and COUT; keep the path to CIN as short as possible. |
| 3 | FB | input | Feedback input to the converter's error amplifier. Connect the tap of an external resistor divider from VOUT to GND to program the output voltage (Vref = 0.8 V typical, ±1.5% over -40 to 125 °C). Never short FB to ground during operation. |
| 4 | EN | input | Precision enable input. High = converter on, Low = off; do not float. Can be tied directly to VIN, or driven from a resistor divider on VIN to implement an adjustable input UVLO threshold. |
| 5 | VIN | power_in | Supply input to the internal bias LDO and to the drain of the high-side FET. Operating range 4 V to 36 V. Connect the input bypass capacitor CIN directly between this pin and GND with minimum loop area. |
| 6 | SW | power_out | Switching node. Internally connected to the source of the high-side FET and the drain of the low-side FET. Connect to the power inductor; also serves as the low-side reference for the CB bootstrap capacitor. Delivers up to 600 mA continuous output current. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Ordering variants
Same part, different packaging or reel option.
- `TPS560430XDBVT`
- `TPS560430XDBVR`
- `TPS560430XDBVTXFDBVT`
- `TPS560430XDBVTXFDBVR`
- `TPS560430XDBVTX3FDBVT`
- `TPS560430XDBVTX3FDBVR`
- `TPS560430XDBVTYDBVT`
- `TPS560430XDBVTYDBVR`
- `TPS560430XDBVTYFDBVT`
- `TPS560430XDBVTYFDBVR`
## CAD (KiCad official)
- Symbol: `TPS560430XDBVT`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `tps560430xdbvt-etched.step` / `tps560430xdbvt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps560430xdbvt.step` / `tps560430xdbvt.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps560430) (None pp, sha256 `f5d28f16b7ee0c6e`, retrieved 2026-08-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps560430xdbvt-datasheet.pdf)