component
TPS560430X3FDBVR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS560430X3FDBVR
Texas Instruments · DC-DC Converters · SOT-23-6
TPS560430X3FDBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CB | passive | Bootstrap capacitor connection for high-side FET driver; connect 100-nF capacitor from this pin to SW pin. |
| 2 | GND | power_in | Power ground terminal connected to low-side FET source internally; connect to system ground with minimum path length. |
| 3 | FB | input | Feedback input for output voltage setting via resistor divider (operating range 0-4.5V); never short to ground during operation. |
| 4 | EN | input | Precision enable input (range 0-VIN) with adjustable UVLO via external resistor divider; high = on, low = off; cannot float. |
| 5 | VIN | power_in | Supply input terminal for internal bias LDO and high-side FET (4-36V recommended operating range); input bypass capacitors must be directly connected to this pin and GND. |
| 6 | SW | power_out | Switching output connected to high-side FET source and low-side FET drain internally; drives power inductor (transient rated to ±3.5V/38V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
TPS560430X3FDBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- Annotated 3D hero:
tps560430x3fdbvr-hero.glb(dashed pad outlines, silkscreen with pin 1, signal names; the adom-hero standard) is what the viewer shows. Downloads and EDA use the clean model,tps560430x3fdbvr-etched.glb. - 3D model files:
tps560430x3fdbvr-etched.step/tps560430x3fdbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps560430x3fdbvr.step/tps560430x3fdbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
f5d28f16b7ee0c6e, retrieved 2026-10-02, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS560430X3FDBVR
**Texas Instruments** · DC-DC Converters · SOT-23-6
TPS560430X3FDBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CB | passive | Bootstrap capacitor connection for high-side FET driver; connect 100-nF capacitor from this pin to SW pin. |
| 2 | GND | power_in | Power ground terminal connected to low-side FET source internally; connect to system ground with minimum path length. |
| 3 | FB | input | Feedback input for output voltage setting via resistor divider (operating range 0-4.5V); never short to ground during operation. |
| 4 | EN | input | Precision enable input (range 0-VIN) with adjustable UVLO via external resistor divider; high = on, low = off; cannot float. |
| 5 | VIN | power_in | Supply input terminal for internal bias LDO and high-side FET (4-36V recommended operating range); input bypass capacitors must be directly connected to this pin and GND. |
| 6 | SW | power_out | Switching output connected to high-side FET source and low-side FET drain internally; drives power inductor (transient rated to ±3.5V/38V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `TPS560430X3FDBVR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- Annotated 3D hero: `tps560430x3fdbvr-hero.glb` (dashed pad outlines, silkscreen with pin 1, signal names; the [adom-hero standard](https://wiki.adom.inc/adom/component-hero)) is what the viewer shows. Downloads and EDA use the clean model, `tps560430x3fdbvr-etched.glb`.
- 3D model files: `tps560430x3fdbvr-etched.step` / `tps560430x3fdbvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps560430x3fdbvr.step` / `tps560430x3fdbvr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps560430) (34 pp, sha256 `f5d28f16b7ee0c6e`, retrieved 2026-10-02, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps560430x3fdbvr-datasheet.pdf)