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TPS54678RTER

Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)

TPS54678RTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input supply voltage, 2.95 V to 6 V.
2 VIN power_in Input supply voltage, 2.95 V to 6 V.
3 GND power_in Power ground that should be electrically connected directly to the thermal pad under the device.
4 GND power_in Power ground that should be electrically connected directly to the thermal pad under the device.
5 AGND power_in Analog ground that should be electrically connected to GND close to the device.
6 VSENSE input Inverting node of the transconductance (gm) error amplifier.
7 COMP output Error amplifier output and input to the output switch current comparator; frequency compensation components should be connected to this pin.
8 RT/CLK bidirectional Resistor Timing or External Clock input pin for adjusting switching frequency from 200 kHz to 2 MHz or synchronizing to an external clock.
9 SS/TR bidirectional Slow-start and Tracking pin; an external capacitor connected to this pin sets the output voltage rise time and can be used for tracking.
10 PH output Source of the internal high-side power MOSFET and drain of the internal low-side synchronous rectifier MOSFET.
11 PH output Source of the internal high-side power MOSFET and drain of the internal low-side synchronous rectifier MOSFET.
12 PH output Source of the internal high-side power MOSFET and drain of the internal low-side synchronous rectifier MOSFET.
13 BOOT input Bootstrap capacitor connection; a 0.1 μF ceramic capacitor is required between BOOT and PH; output is forced to switch off if voltage falls below minimum BOOT UVLO threshold of 2.2 V.
14 PWRGD output Open-drain output that asserts low if output voltage is low due to thermal shutdown, overvoltage, undervoltage, or EN shutdown; de-asserts when VSENSE is within 93% to 103% of internal reference.
15 EN input Enable pin with internal pullup current source; pull below 1.2 V to disable, float to enable; rising threshold 1.3 V, falling threshold 1.18 V; can be used to set on/off threshold with two additional resistors.
16 VIN power_in Input supply voltage, 2.95 V to 6 V.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS54678RTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps54678rter-etched.step / tps54678rter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54678rter.step / tps54678rter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (44 pp, sha256 5946bc6105aff6d5, retrieved 2026-09-26, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF