TPS54560DDAR

@@ -0,0 +1,49 @@+# TPS54560DDAR++**Texas Instruments** · DC-DC Converters · SOIC-8-EP++TPS54560DDAR from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BOOT | passive | Bootstrap capacitor node for high-side MOSFET gate drive. A bootstrap capacitor is required between BOOT and SW; if the voltage on this capacitor falls below the minimum required to operate the high-side MOSFET, the output is switched off until the capacitor is refreshed. BOOT-SW absolute maximum is 8 V. |+| 2 | VIN | power_in | Input supply voltage with 4.5 V to 60 V operating range (absolute maximum 65 V). Provides power to the internal high-side MOSFET and control circuitry. |+| 3 | EN | input | Enable input with internal pull-up current source (~1.2 µA). Pull below 1.2 V to disable; float to enable. Can be used with two resistors to program input undervoltage lockout. Absolute maximum 8.4 V. |+| 4 | RT/CLK | bidirectional | Resistor Timing and External Clock input. An internal amplifier holds this terminal at a fixed voltage when using an external resistor to ground to set the switching frequency (100 kHz to 2.5 MHz). If pulled above the PLL upper threshold, the terminal becomes a synchronization clock input (160 kHz to 2.3 MHz). Absolute maximum 3.6 V. |+| 5 | FB | input | Inverting input of the transconductance (gm) error amplifier. Regulates to the internal 0.8 V reference. Absolute maximum 3 V. |+| 6 | COMP | output | Error amplifier output and input to the output switch current (PWM) comparator. Connect frequency compensation components (Type-II RC network) between COMP and GND. Absolute maximum 3 V. |+| 7 | GND | power_in | Device ground reference. Must be connected to the exposed thermal pad on the PCB for proper operation. |+| 8 | SW | power_out | Source of the internal high-side power MOSFET and switching node of the converter. Connect to the output inductor and catch (Schottky) diode. Absolute maximum -0.6 V to 65 V (-2 V for 10 ns transients). |+| 9 | Thermal Pad | power_in | Exposed thermal pad on the bottom of the package. Must be electrically connected to the GND terminal on the PCB and to a copper heat-sinking area for proper thermal and electrical operation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `TPS54560DDARDDAR`+- `TPS54560DDARDDA`++## CAD (KiCad official)++- Symbol: `TPS54560DDAR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps54560ddar.pdf) (46 pp, sha256 `0ac3f17dc0fba7b9`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps54560ddar-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "tps54560ddar",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "tps54560ddar"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps54560ddar.kicad_sym",+    "tps54560ddar.kicad_mod",+    "tps54560ddar.glb",+    "tps54560ddar.step",+    "tps54560ddar.lbr",+    "docs/hero.png",+    "docs/tps54560ddar-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file