# TPS54560BQDDARQ1

**Texas Instruments** · DC-DC Converters · SOP-8-EP

TPS54560BQDDARQ1 from Texas Instruments, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | A bootstrap capacitor is required between BOOT and SW; if its voltage falls below the minimum needed to operate the high-side MOSFET, the output is switched off until the capacitor is refreshed. |
| 2 | VIN | power_in | Input supply voltage with 4.5 V to 60 V operating range. |
| 3 | EN | input | Enable terminal with internal pull-up current source; pull below 1.2 V to disable, float to enable, and use two resistors to adjust the input undervoltage lockout. |
| 4 | RT/CLK | input | Resistor timing and external clock terminal; a resistor to ground sets the switching frequency, and pulling it above the PLL upper threshold makes it a synchronization clock input to the internal PLL. |
| 5 | FB | input | Inverting input of the transconductance (gm) error amplifier. |
| 6 | COMP | output | Error amplifier output and input to the output switch current (PWM) comparator; connect frequency compensation components to this terminal. |
| 7 | GND | power_in | Ground. |
| 8 | SW | passive | The source of the internal high-side power MOSFET and switching node of the converter. |
| 9 | PowerPAD | power_in | Thermal pad; the GND terminal must be electrically connected to the exposed pad on the printed circuit board for proper operation. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |

## CAD (KiCad official)

- Symbol: `TPS54560BQDDARQ1`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files: `tps54560bqddarq1-etched.step` / `tps54560bqddarq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps54560bqddarq1.step` / `tps54560bqddarq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps54560b-q1) (50 pp, sha256 `5069261980602131`, retrieved 2026-10-03, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps54560bqddarq1-datasheet.pdf)