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TPS54560BQDDAQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS54560BQDDAQ1
Texas Instruments · DC-DC Converters · SO-8
TPS54560BQDDAQ1 from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | output | A bootstrap capacitor is required between BOOT and SW; if its voltage falls below the minimum needed to operate the high-side MOSFET, the output is switched off until the capacitor is refreshed. |
| 2 | VIN | power_in | Input supply voltage with a 4.5 V to 60 V operating range. |
| 3 | EN | input | Enable terminal with an internal pull-up current source; pull below 1.2 V to disable and float to enable, with the input undervoltage lockout adjustable through two resistors. |
| 4 | RT/CLK | input | Resistor timing and external clock terminal: an external resistor to ground sets the switching frequency, and pulling the terminal above the PLL upper threshold makes it a synchronization input. |
| 5 | FB | input | Inverting input of the transconductance (gm) error amplifier. |
| 6 | COMP | output | Error amplifier output and input to the output switch current (PWM) comparator; frequency compensation components connect to this terminal. |
| 7 | GND | power_in | Ground; must be electrically connected to the exposed PowerPAD on the printed circuit board for proper operation. |
| 8 | SW | output | Source of the internal high-side power MOSFET and the switching node of the converter. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS54560BQDDAQ1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
tps54560bqddaq1-etched.step/tps54560bqddaq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps54560bqddaq1.step/tps54560bqddaq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (50 pp, sha256
5069261980602131, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS54560BQDDAQ1
**Texas Instruments** · DC-DC Converters · SO-8
TPS54560BQDDAQ1 from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | output | A bootstrap capacitor is required between BOOT and SW; if its voltage falls below the minimum needed to operate the high-side MOSFET, the output is switched off until the capacitor is refreshed. |
| 2 | VIN | power_in | Input supply voltage with a 4.5 V to 60 V operating range. |
| 3 | EN | input | Enable terminal with an internal pull-up current source; pull below 1.2 V to disable and float to enable, with the input undervoltage lockout adjustable through two resistors. |
| 4 | RT/CLK | input | Resistor timing and external clock terminal: an external resistor to ground sets the switching frequency, and pulling the terminal above the PLL upper threshold makes it a synchronization input. |
| 5 | FB | input | Inverting input of the transconductance (gm) error amplifier. |
| 6 | COMP | output | Error amplifier output and input to the output switch current (PWM) comparator; frequency compensation components connect to this terminal. |
| 7 | GND | power_in | Ground; must be electrically connected to the exposed PowerPAD on the printed circuit board for proper operation. |
| 8 | SW | output | Source of the internal high-side power MOSFET and the switching node of the converter. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TPS54560BQDDAQ1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `tps54560bqddaq1-etched.step` / `tps54560bqddaq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps54560bqddaq1.step` / `tps54560bqddaq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps54560b-q1) (50 pp, sha256 `5069261980602131`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps54560bqddaq1-datasheet.pdf)