component
TPS54478RTET
Public Made by Adomby adom
Texas Instruments DC-DC Converters, WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS54478RTET
Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)
TPS54478RTET from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply voltage, 2.95 V to 6 V. |
| 2 | VIN | power_in | Input supply voltage, 2.95 V to 6 V. |
| 3 | GND | power_in | Power ground, to be electrically connected directly to the power pad under the IC. |
| 4 | GND | power_in | Power ground, to be electrically connected directly to the power pad under the IC. |
| 5 | AGND | power_in | Analog ground, to be electrically connected to GND close to the device. |
| 6 | VSENSE | input | Inverting node of the transconductance (gm) error amplifier. |
| 7 | COMP | bidirectional | Error amplifier output and input to the output switch current comparator; frequency compensation components connect to this pin. |
| 8 | RT/CLK | input | Resistor timing or external clock input pin; 16 kΩ to 150 kΩ sets 2000 kHz to 200 kHz switching frequency. |
| 9 | SS/TR | input | Slow start and tracking pin; an external capacitor sets the output voltage rise time, and the pin can also be used for tracking. |
| 10 | PH | output | Source of the internal high side power MOSFET and drain of the internal low side synchronous rectifier MOSFET. |
| 11 | PH | output | Source of the internal high side power MOSFET and drain of the internal low side synchronous rectifier MOSFET. |
| 12 | PH | output | Source of the internal high side power MOSFET and drain of the internal low side synchronous rectifier MOSFET. |
| 13 | BOOT | output | Bootstrap capacitor required between BOOT and PH; output is forced off if the capacitor voltage is below the BOOT UVLO minimum. |
| 14 | PWRGD | output | Open drain output that asserts low if output voltage is low due to thermal shutdown, overcurrent, over/under-voltage or EN shutdown. |
| 15 | EN | input | Enable pin with internal pull-up current source; pull below 1.21 V to disable, float to enable, or use two resistors to set the UVLO threshold. |
| 16 | VIN | power_in | Input supply voltage, 2.95 V to 6 V. |
| 17 | Thermal Pad | power_in | Exposed thermal pad connected to GND for proper operation, and to an internal PCB ground plane using multiple vias for thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
TPS54478RTET - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tps54478rtet-etched.step/tps54478rtet-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps54478rtet.step/tps54478rtet.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
efbe291862db5c5d, retrieved 2026-10-05, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS54478RTET
**Texas Instruments** · DC-DC Converters · WQFN-16-EP(3x3)
TPS54478RTET from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply voltage, 2.95 V to 6 V. |
| 2 | VIN | power_in | Input supply voltage, 2.95 V to 6 V. |
| 3 | GND | power_in | Power ground, to be electrically connected directly to the power pad under the IC. |
| 4 | GND | power_in | Power ground, to be electrically connected directly to the power pad under the IC. |
| 5 | AGND | power_in | Analog ground, to be electrically connected to GND close to the device. |
| 6 | VSENSE | input | Inverting node of the transconductance (gm) error amplifier. |
| 7 | COMP | bidirectional | Error amplifier output and input to the output switch current comparator; frequency compensation components connect to this pin. |
| 8 | RT/CLK | input | Resistor timing or external clock input pin; 16 kΩ to 150 kΩ sets 2000 kHz to 200 kHz switching frequency. |
| 9 | SS/TR | input | Slow start and tracking pin; an external capacitor sets the output voltage rise time, and the pin can also be used for tracking. |
| 10 | PH | output | Source of the internal high side power MOSFET and drain of the internal low side synchronous rectifier MOSFET. |
| 11 | PH | output | Source of the internal high side power MOSFET and drain of the internal low side synchronous rectifier MOSFET. |
| 12 | PH | output | Source of the internal high side power MOSFET and drain of the internal low side synchronous rectifier MOSFET. |
| 13 | BOOT | output | Bootstrap capacitor required between BOOT and PH; output is forced off if the capacitor voltage is below the BOOT UVLO minimum. |
| 14 | PWRGD | output | Open drain output that asserts low if output voltage is low due to thermal shutdown, overcurrent, over/under-voltage or EN shutdown. |
| 15 | EN | input | Enable pin with internal pull-up current source; pull below 1.21 V to disable, float to enable, or use two resistors to set the UVLO threshold. |
| 16 | VIN | power_in | Input supply voltage, 2.95 V to 6 V. |
| 17 | Thermal Pad | power_in | Exposed thermal pad connected to GND for proper operation, and to an internal PCB ground plane using multiple vias for thermal performance. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
## CAD (KiCad official)
- Symbol: `TPS54478RTET`
- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`
- 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `tps54478rtet-etched.step` / `tps54478rtet-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps54478rtet.step` / `tps54478rtet.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps54478) (43 pp, sha256 `efbe291862db5c5d`, retrieved 2026-10-05, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps54478rtet-datasheet.pdf)