← Commit history

Initial commit: component/tps54427ddar

Ray ·a493b60a8a ·1mo ago
2 files changed +85
README.mdadded+51
@@ -0,0 +1,51 @@+# TPS54427DDAR++**Texas Instruments** · DC-DC Converters · SOP-8++TPS54427DDAR from Texas Instruments, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | EN | input | Enable input control. Active high; must be pulled up to enable the device. VIH ≥ 1.6 V, VIL ≤ 0.6 V. Internal ~450 kΩ pull-down to GND (225-900 kΩ). Absolute max −0.3 to 20 V. |+| 2 | VFB | input | Converter feedback input. Connect to the output voltage via a resistor divider to set VOUT. Internal reference (VFBTH) is 765 mV typ (757-773 mV at 25 °C). Input current ±0.1 µA max. |+| 3 | VREG5 | power_out | 5.5 V internal LDO power supply output (5.2-5.7 V, up to 60 mA). Bypass with a ~1 µF capacitor to GND. Not active when EN is low. Also feeds internal gate drive. |+| 4 | SS | input | Soft-start control. Connect an external capacitor from SS to GND to program the soft-start ramp time. Absolute max −0.3 to 6.5 V. |+| 5 | GND | power_in | Ground pin. Power ground return for the switching circuit. Sensitive SS and VFB returns must be tied to GND at a single point. |+| 6 | SW | power_out | Switch node between the high-side NFET (drain of low-side, source of high-side). Connect to the output inductor. Absolute max −2 to 20 V (−3 to 22 V for 10 ns transients). |+| 7 | VBST | power_in | Bootstrap supply for the high-side FET gate driver. Connect a 0.1 µF capacitor between VBST and SW. An internal diode is connected between VREG5 and VBST for charging. VBST(vs SW) max 6 V. |+| 8 | VIN | power_in | Input voltage supply pin. Operating range 4.5 V to 18 V (absolute max 20 V). Bypass with ceramic capacitance close to the pin. |+| 9 | PowerPAD | power_in | Exposed thermal pad on the underside. Must be soldered to the PCB ground plane for proper thermal dissipation and must be electrically connected to GND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOP-8 |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `TPS54427DDARDDA`+- `TPS54427DDARDDAR`+- `TPS54427DDARDRC`+- `TPS54427DDARDRCR`++## CAD (KiCad official)++- Symbol: `TPS54427DDAR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps54427ddar.pdf) (32 pp, sha256 `75b4634a9b5c2b51`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps54427ddar-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "tps54427ddar",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "tps54427ddar"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps54427ddar.kicad_sym",+    "tps54427ddar.kicad_mod",+    "tps54427ddar.glb",+    "tps54427ddar.step",+    "tps54427ddar.lbr",+    "docs/hero.png",+    "docs/tps54427ddar-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file