component
TPS54386TPWPRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+52@@ -0,0 +1,52 @@+# TPS54386TPWPRQ1++**Texas Instruments** · DC-DC Converters · HTSSOP-14-EP++TPS54386TPWPRQ1 from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PVDD1 | power_in | Power input to output 1 high-side MOSFET; bypass to ground with 10-μF or greater low-ESR ceramic capacitor. |+| 2 | BOOT1 | input | Bootstrap supply for output 1 high-side gate driver; connect 22-nF to 82-nF capacitor between this pin and SW1. |+| 3 | SW1 | output | Switching output for output 1 PWM; snubber recommended to reduce ringing on this node. |+| 4 | GND | power_in | Ground reference pin for device; connect directly to thermal pad on bottom side. |+| 5 | EN1 | input | Active-low enable input for output 1; enables when <0.9 V, disables when >1.55 V with 50-mV hysteresis. |+| 6 | EN2 | input | Active-low enable input for output 2; enables when <0.9 V, disables when >1.55 V with 50-mV hysteresis. |+| 7 | FB1 | input | Voltage feedback input for output 1; error amplifier regulates this pin to 800-mV internal reference voltage. |+| 8 | FB2 | input | Voltage feedback input for output 2; error amplifier regulates this pin to 800-mV internal reference voltage. |+| 9 | ILIM2 | input | Current limit threshold selection input for output 2; internal 150-kΩ divider connects BP to this pin and to ground. |+| 10 | SEQ | input | Sequencing mode selection pin; internal 150-kΩ divider connects BP to this pin and to ground for output startup sequence control. |+| 11 | BP | power_out | Regulated 5.25-V output from internal LDO regulator; bypass to ground with 4.7-μF to 10-μF low-ESR ceramic capacitor. |+| 12 | SW2 | output | Switching output for output 2 PWM; snubber recommended to reduce ringing on this node. |+| 13 | BOOT2 | input | Bootstrap supply for output 2 high-side gate driver; connect 22-nF to 82-nF capacitor between this pin and SW2. |+| 14 | PVDD2 | power_in | Power input for device control circuitry and output 2 high-side MOSFET; bypass to ground with 10-μF or greater low-ESR ceramic capacitor. |+| 15 | Thermal pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-14-EP |+| Category | Power Management (PMIC) |+| Pins | 15 |++## CAD (KiCad official)++- Symbol: `TPS54386TPWPRQ1`+- Footprint: `Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)+- 3D model files: `tps54386tpwprq1-etched.step` / `tps54386tpwprq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps54386tpwprq1.step` / `tps54386tpwprq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps54386-q1) (54 pp, sha256 `286d9af6abcb22d4`, retrieved 2026-10-03, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps54386tpwprq1-datasheet.pdf)
page.jsonadded+202@@ -0,0 +1,202 @@+{+ "slug": "tps54386tpwprq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps54386tpwprq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps54386tpwprq1.kicad_sym",+ "tps54386tpwprq1.kicad_mod",+ "tps54386tpwprq1.glb",+ "tps54386tpwprq1.step",+ "tps54386tpwprq1.lbr",+ "docs/hero.png",+ "docs/tps54386tpwprq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps54386tpwprq1-hero.glb",+ "tps54386tpwprq1-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS54386TPWPRQ1",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-14-EP",+ "pin_count": 15,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps54386-q1",+ "parts": {+ "symbol": "tps54386tpwprq1.kicad_sym",+ "footprint": "tps54386tpwprq1.kicad_mod",+ "model_3d": "tps54386tpwprq1-hero.glb",+ "model_3d_plain": "tps54386tpwprq1.glb",+ "model_3d_step": "tps54386tpwprq1-etched.step",+ "model_3d_step_plain": "tps54386tpwprq1.step",+ "lbr": "tps54386tpwprq1.lbr"+ },+ "distributor_links": {+ "lcsc": 2071610,+ "digikey": "296-TPS54386TPWPRQ1TR-ND",+ "mouser": "595-TPS54386TPWPRQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T09:16:58Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-TPS54386TPWPRQ1TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS54386TPWPRQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "PVDD1",+ "type": "power_in",+ "description": "Power input to output 1 high-side MOSFET; bypass to ground with 10-μF or greater low-ESR ceramic capacitor."+ },+ {+ "number": "2",+ "name": "BOOT1",+ "type": "input",+ "description": "Bootstrap supply for output 1 high-side gate driver; connect 22-nF to 82-nF capacitor between this pin and SW1."+ },+ {+ "number": "3",+ "name": "SW1",+ "type": "output",+ "description": "Switching output for output 1 PWM; snubber recommended to reduce ringing on this node."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference pin for device; connect directly to thermal pad on bottom side."+ },+ {+ "number": "5",+ "name": "EN1",+ "type": "input",+ "description": "Active-low enable input for output 1; enables when <0.9 V, disables when >1.55 V with 50-mV hysteresis."+ },+ {+ "number": "6",+ "name": "EN2",+ "type": "input",+ "description": "Active-low enable input for output 2; enables when <0.9 V, disables when >1.55 V with 50-mV hysteresis."+ },+ {+ "number": "7",+ "name": "FB1",+ "type": "input",+ "description": "Voltage feedback input for output 1; error amplifier regulates this pin to 800-mV internal reference voltage."+ },+ {+ "number": "8",+ "name": "FB2",+ "type": "input",+ "description": "Voltage feedback input for output 2; error amplifier regulates this pin to 800-mV internal reference voltage."+ },+ {+ "number": "9",+ "name": "ILIM2",+ "type": "input",+ "description": "Current limit threshold selection input for output 2; internal 150-kΩ divider connects BP to this pin and to ground."+ },+ {+ "number": "10",+ "name": "SEQ",+ "type": "input",+ "description": "Sequencing mode selection pin; internal 150-kΩ divider connects BP to this pin and to ground for output startup sequence control."+ },+ {+ "number": "11",+ "name": "BP",+ "type": "power_out",+ "description": "Regulated 5.25-V output from internal LDO regulator; bypass to ground with 4.7-μF to 10-μF low-ESR ceramic capacitor."+ },+ {+ "number": "12",+ "name": "SW2",+ "type": "output",+ "description": "Switching output for output 2 PWM; snubber recommended to reduce ringing on this node."+ },+ {+ "number": "13",+ "name": "BOOT2",+ "type": "input",+ "description": "Bootstrap supply for output 2 high-side gate driver; connect 22-nF to 82-nF capacitor between this pin and SW2."+ },+ {+ "number": "14",+ "name": "PVDD2",+ "type": "power_in",+ "description": "Power input for device control circuitry and output 2 high-side MOSFET; bypass to ground with 10-μF or greater low-ESR ceramic capacitor."+ },+ {+ "number": "15",+ "name": "Thermal pad",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 15 added from the footprint"+ ],+ "pages_sent": 14,+ "cost_usd": 0.1384,+ "at": "2026-10-03T09:16:35"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps54386-q1",+ "pages": 54,+ "sha256": "286d9af6abcb22d4",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 15,+ "described": 15,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}