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TPS54380PWPR

Texas Instruments · DC-DC Converters · HTSSOP-20-EP

TPS54380PWPR from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AGND power_in Analog ground and return for the compensation network/output divider, slow-start capacitor, VBIAS capacitor and RT resistor; connect the PowerPAD to AGND.
2 VSENSE input Error amplifier inverting input, connected to the output voltage through the compensation network/output divider (absolute maximum -0.3 V to 4 V).
3 COMP output Error amplifier output; the frequency compensation network is connected from COMP to VSENSE.
4 PWRGD output Power-good open-drain output that is high when VSENSE is at or above 90% of Vref and low otherwise (absolute maximum 7 V, sink current 10 mA).
5 BOOT passive Bootstrap output; a 0.022 µF to 0.1 µF low-ESR capacitor from BOOT to PH generates the floating drive for the high-side FET driver.
6 PH output Phase output at the junction of the internal high-side and low-side power MOSFETs and the output inductor (absolute maximum -0.6 V to 10 V).
7 PH output Phase output at the junction of the internal high-side and low-side power MOSFETs and the output inductor (absolute maximum -0.6 V to 10 V).
8 PH output Phase output at the junction of the internal high-side and low-side power MOSFETs and the output inductor (absolute maximum -0.6 V to 10 V).
9 PH output Phase output at the junction of the internal high-side and low-side power MOSFETs and the output inductor (absolute maximum -0.6 V to 10 V).
10 PH output Phase output at the junction of the internal high-side and low-side power MOSFETs and the output inductor (absolute maximum -0.6 V to 10 V).
11 PGND power_in Power ground and high-current return for the low-side driver and power MOSFET; a single-point connection to AGND is recommended.
12 PGND power_in Power ground and high-current return for the low-side driver and power MOSFET; a single-point connection to AGND is recommended.
13 PGND power_in Power ground and high-current return for the low-side driver and power MOSFET; a single-point connection to AGND is recommended.
14 VIN power_in Input supply for the power MOSFET switches and internal bias regulator (3 V to 6 V recommended operating input); bypass to PGND close to the package with a low-ESR 10 µF ceramic capacitor.
15 VIN power_in Input supply for the power MOSFET switches and internal bias regulator (3 V to 6 V recommended operating input); bypass to PGND close to the package with a low-ESR 10 µF ceramic capacitor.
16 VIN power_in Input supply for the power MOSFET switches and internal bias regulator (3 V to 6 V recommended operating input); bypass to PGND close to the package with a low-ESR 10 µF ceramic capacitor.
17 VBIAS power_out Internal bias regulator output supplying regulated voltage to internal circuitry; bypass to AGND with a low-ESR 0.1 µF to 1.0 µF ceramic capacitor.
18 TRACKIN input External reference input, high-impedance input to the internal reference/multiplexer and error amplifier circuits (input range 0 V to Vref).
19 ENA input Enable input; logic high enables the oscillator, PWM control and MOSFET driver, while logic low disables operation and places the device in a low quiescent current state (enable threshold 1.20 V typical, absolute maximum 6 V... see review note).
20 RT input Frequency setting resistor input; connect a resistor from RT to AGND to set the switching frequency (absolute maximum -0.3 V to 6 V).
21 PowerPAD passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20-EP
Category Power Supply Chip
Pins 21

CAD (KiCad official)

  • Symbol: TPS54380PWPR
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps54380pwpr-etched.step / tps54380pwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54380pwpr.step / tps54380pwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 976648eaaef200b4, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF