component
TPS54361QDPRTQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, WSON-10-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS54361QDPRTQ1
Texas Instruments · DC-DC Converters · WSON-10-EP(4x4)
TPS54361QDPRTQ1 from Texas Instruments, in a WSON-10-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | output | A bootstrap capacitor is required between BOOT and SW, and the high-side MOSFET gate drive switches off when that capacitor voltage falls below the minimum required to operate it. |
| 2 | VIN | power_in | Input supply voltage with a 4.5-V to 60-V operating range. |
| 3 | EN | input | Enable pin with an internal pullup current source that disables the device when pulled below 1.2 V and enables it when floated, and it sets the input undervoltage lockout with two resistors. |
| 4 | SS/TR | input | Soft-start and tracking pin where an external capacitor sets the output rise time, and the pin voltage overrides the internal reference to allow tracking and sequencing. |
| 5 | RT/CLK | input | Resistor timing and external clock pin that sets the switching frequency, and becomes a synchronization input when pulled above the PLL upper threshold. |
| 6 | FB | input | Inverting input of the transconductance (gm) error amplifier. |
| 7 | COMP | output | Error amplifier output and input to the output switch current (PWM) comparator, where frequency compensation components connect. |
| 8 | GND | power_in | Ground pin that must be electrically connected to the exposed thermal pad on the printed circuit board for proper operation. |
| 9 | SW | output | Source of the internal high-side power MOSFET and the switching node of the converter. |
| 10 | PWRGD | output | Open-drain output that asserts low if the output voltage is out of regulation due to thermal shutdown, dropout, over-voltage, or EN shutdown. |
| 11 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-10-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 11 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | -0.3 | 65 | V | 4 | ||
| Input voltage EN | EN | -0.3 | 8.4 | V | 4 | ||
| Input voltage BOOT | BOOT | 73 | V | 4 | |||
| Input voltage FB | FB | -0.3 | 3 | V | 4 | ||
| Input voltage COMP | COMP | -0.3 | 3 | V | 4 | ||
| Input voltage PWRGD | PWRGD | -0.3 | 6 | V | 4 | ||
| Input voltage SS/TR | SS/TR | -0.3 | 3 | V | 4 | ||
| Input voltage RT/CLK | RT/CLK | -0.3 | 3.6 | V | 4 | ||
| Output voltage BOOT-SW | BOOT-SW | 8 | V | 4 | |||
| Output voltage SW | SW | -0.6 | 65 | V | 4 | ||
| Output voltage SW 5-ns transient | SW | -7 | 65 | V | 5-ns transient | 4 | |
| Output voltage SW 10-ns transient | SW | -2 | 65 | V | 10-ns transient | 4 | |
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply input voltage | V(VIN) | 4.5 | 60 | V | 4 | ||
| Output voltage | VO | 0.8 | 58.8 | V | 4 | ||
| Output current | IO | 0 | 3.5 | A | 4 | ||
| Junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Operating input voltage | 4.5 | 60 | V | 5 | |||
| Internal undervoltage lockout threshold | 4.1 | 4.3 | 4.48 | V | Rising | 5 | |
| Operating nonswitching supply current | 152 | 200 | µA | V(FB) = 0.9 V, TA = 25°C | 5 | ||
| Shutdown supply current | 2.25 | 4.5 | µA | V(EN) = 0 V, 25°C, 4.5 V ≤ V(VIN) ≤ 60 V | 5 | ||
| Enable threshold voltage | V(EN)th | 1.1 | 1.2 | 1.3 | V | No voltage hysteresis, rising and falling | 5 |
| Input current at enable threshold -50 mV | II | -0.58 | -1.2 | -1.8 | µA | Enable threshold -50 mV | 5 |
| Hysteresis current | Ihys | -2.2 | -3.4 | -4.5 | µA | 5 | |
| Voltage reference | 0.792 | 0.8 | 0.808 | V | 5 | ||
| On-resistance high-side MOSFET | 87 | 185 | mΩ | V(VIN) = 12 V, V(BOOT-SW) = 6 V | 5 | ||
| Error amplifier transconductance (gm) | gm | 350 | µMhos | -2 μA < I(COMP) < 2 μA, V(COMP) = 1 V | 5 | ||
| Error amplifier transconductance (gm) during soft-start | gm | 77 | µMhos | -2 μA < I(COMP) < 2 μA, V(COMP) = 1 V, V(FB) = 0.4 V | 5 | ||
| Min unity gain bandwidth | 2500 | kHz | 5 | ||||
| Error amplifier source/sink COMP to SW current | -30 | 30 | µA | V(COMP) = 1 V, 100-mV overdrive | 5 | ||
| Current-limit threshold | 4.5 | 5.5 | 6.8 | A | All VIN and temperatures, open loop | 5 | |
| Current-limit threshold | 4.5 | 5.5 | 6.3 | A | All temperatures, V(VIN) = 12 V, open loop | 5 | |
| Current-limit threshold | 5.2 | 5.5 | 5.9 | A | V(VIN) = 12 V, TA = 25°C, open loop | 5 | |
| RT/CLK high threshold | 1.55 | 2 | V | 5 | |||
| RT/CLK low threshold | 0.5 | 1.2 | V | 6 | |||
| Minimum VIN for defined output | 0.9 | 2 | V | V(PWRGD) < 0.5 V, I(PWRGD) = 100 µA | 6 | ||
| Switching frequency range using RT mode | 100 | 2500 | kHz | 6 | |||
| Switching frequency | ƒS | 450 | 500 | 550 | kHz | R(RT) = 200 kΩ | 6 |
| Switching frequency range using CLK mode | 160 | 2300 | kHz | 6 | |||
| Minimum CLK input pulse width | 15 | ns | 6 | ||||
| Junction-to-ambient thermal resistance | RθJA | 35.1 | °C/W | standard board | 5 | ||
| Junction-to-top characterization parameter | ψJT | 0.3 | °C/W | 5 | |||
| Junction-to-board characterization parameter | ψJB | 12.5 | °C/W | 5 | |||
| Junction-to-case(top) thermal resistance | RθJCtop | 34.1 | °C/W | 5 | |||
| Junction-to-case(bottom) thermal resistance | RθJCbot | 2.2 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 12.3 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
TPS54361QDPRTQ1 - Footprint:
Package_SON:WSON-10-1EP_4x4mm_P0.8mm_EP2.6x3mm - 3D model: WSON-10-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
tps54361qdprtq1-etched.step/tps54361qdprtq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps54361qdprtq1.step/tps54361qdprtq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (53 pp, sha256
f2fecc1f86f11f31, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS54361QDPRTQ1
**Texas Instruments** · DC-DC Converters · WSON-10-EP(4x4)
TPS54361QDPRTQ1 from Texas Instruments, in a WSON-10-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | output | A bootstrap capacitor is required between BOOT and SW, and the high-side MOSFET gate drive switches off when that capacitor voltage falls below the minimum required to operate it. |
| 2 | VIN | power_in | Input supply voltage with a 4.5-V to 60-V operating range. |
| 3 | EN | input | Enable pin with an internal pullup current source that disables the device when pulled below 1.2 V and enables it when floated, and it sets the input undervoltage lockout with two resistors. |
| 4 | SS/TR | input | Soft-start and tracking pin where an external capacitor sets the output rise time, and the pin voltage overrides the internal reference to allow tracking and sequencing. |
| 5 | RT/CLK | input | Resistor timing and external clock pin that sets the switching frequency, and becomes a synchronization input when pulled above the PLL upper threshold. |
| 6 | FB | input | Inverting input of the transconductance (gm) error amplifier. |
| 7 | COMP | output | Error amplifier output and input to the output switch current (PWM) comparator, where frequency compensation components connect. |
| 8 | GND | power_in | Ground pin that must be electrically connected to the exposed thermal pad on the printed circuit board for proper operation. |
| 9 | SW | output | Source of the internal high-side power MOSFET and the switching node of the converter. |
| 10 | PWRGD | output | Open-drain output that asserts low if the output voltage is out of regulation due to thermal shutdown, dropout, over-voltage, or EN shutdown. |
| 11 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-10-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 11 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | -0.3 | | 65 | V | | 4 |
| Input voltage EN | EN | -0.3 | | 8.4 | V | | 4 |
| Input voltage BOOT | BOOT | | | 73 | V | | 4 |
| Input voltage FB | FB | -0.3 | | 3 | V | | 4 |
| Input voltage COMP | COMP | -0.3 | | 3 | V | | 4 |
| Input voltage PWRGD | PWRGD | -0.3 | | 6 | V | | 4 |
| Input voltage SS/TR | SS/TR | -0.3 | | 3 | V | | 4 |
| Input voltage RT/CLK | RT/CLK | -0.3 | | 3.6 | V | | 4 |
| Output voltage BOOT-SW | BOOT-SW | | | 8 | V | | 4 |
| Output voltage SW | SW | -0.6 | | 65 | V | | 4 |
| Output voltage SW 5-ns transient | SW | -7 | | 65 | V | 5-ns transient | 4 |
| Output voltage SW 10-ns transient | SW | -2 | | 65 | V | 10-ns transient | 4 |
| Operating junction temperature | TJ | -40 | | 150 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Supply input voltage | V(VIN) | 4.5 | | 60 | V | | 4 |
| Output voltage | VO | 0.8 | | 58.8 | V | | 4 |
| Output current | IO | 0 | | 3.5 | A | | 4 |
| Junction temperature | TJ | -40 | | 150 | °C | | 4 |
| Operating input voltage | | 4.5 | | 60 | V | | 5 |
| Internal undervoltage lockout threshold | | 4.1 | 4.3 | 4.48 | V | Rising | 5 |
| Operating nonswitching supply current | | | 152 | 200 | µA | V(FB) = 0.9 V, TA = 25°C | 5 |
| Shutdown supply current | | 2.25 | | 4.5 | µA | V(EN) = 0 V, 25°C, 4.5 V ≤ V(VIN) ≤ 60 V | 5 |
| Enable threshold voltage | V(EN)th | 1.1 | 1.2 | 1.3 | V | No voltage hysteresis, rising and falling | 5 |
| Input current at enable threshold -50 mV | II | -0.58 | -1.2 | -1.8 | µA | Enable threshold -50 mV | 5 |
| Hysteresis current | Ihys | -2.2 | -3.4 | -4.5 | µA | | 5 |
| Voltage reference | | 0.792 | 0.8 | 0.808 | V | | 5 |
| On-resistance high-side MOSFET | | | 87 | 185 | mΩ | V(VIN) = 12 V, V(BOOT-SW) = 6 V | 5 |
| Error amplifier transconductance (gm) | gm | | 350 | | µMhos | -2 μA < I(COMP) < 2 μA, V(COMP) = 1 V | 5 |
| Error amplifier transconductance (gm) during soft-start | gm | | 77 | | µMhos | -2 μA < I(COMP) < 2 μA, V(COMP) = 1 V, V(FB) = 0.4 V | 5 |
| Min unity gain bandwidth | | 2500 | | | kHz | | 5 |
| Error amplifier source/sink COMP to SW current | | -30 | | 30 | µA | V(COMP) = 1 V, 100-mV overdrive | 5 |
| Current-limit threshold | | 4.5 | 5.5 | 6.8 | A | All VIN and temperatures, open loop | 5 |
| Current-limit threshold | | 4.5 | 5.5 | 6.3 | A | All temperatures, V(VIN) = 12 V, open loop | 5 |
| Current-limit threshold | | 5.2 | 5.5 | 5.9 | A | V(VIN) = 12 V, TA = 25°C, open loop | 5 |
| RT/CLK high threshold | | 1.55 | | 2 | V | | 5 |
| RT/CLK low threshold | | 0.5 | | 1.2 | V | | 6 |
| Minimum VIN for defined output | | 0.9 | | 2 | V | V(PWRGD) < 0.5 V, I(PWRGD) = 100 µA | 6 |
| Switching frequency range using RT mode | | 100 | | 2500 | kHz | | 6 |
| Switching frequency | ƒS | 450 | 500 | 550 | kHz | R(RT) = 200 kΩ | 6 |
| Switching frequency range using CLK mode | | 160 | | 2300 | kHz | | 6 |
| Minimum CLK input pulse width | | | | 15 | ns | | 6 |
| Junction-to-ambient thermal resistance | RθJA | | 35.1 | | °C/W | standard board | 5 |
| Junction-to-top characterization parameter | ψJT | | 0.3 | | °C/W | | 5 |
| Junction-to-board characterization parameter | ψJB | | 12.5 | | °C/W | | 5 |
| Junction-to-case(top) thermal resistance | RθJCtop | | 34.1 | | °C/W | | 5 |
| Junction-to-case(bottom) thermal resistance | RθJCbot | | 2.2 | | °C/W | | 5 |
| Junction-to-board thermal resistance | RθJB | | 12.3 | | °C/W | | 5 |
## CAD (KiCad official)
- Symbol: `TPS54361QDPRTQ1`
- Footprint: `Package_SON:WSON-10-1EP_4x4mm_P0.8mm_EP2.6x3mm`
- 3D model: WSON-10-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `tps54361qdprtq1-etched.step` / `tps54361qdprtq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps54361qdprtq1.step` / `tps54361qdprtq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps54361-q1.pdf) (53 pp, sha256 `f2fecc1f86f11f31`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps54361qdprtq1-datasheet.pdf)