main
Ray tps54360ddar: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 2ce252f 20h ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "tps54360ddar",
  "title": "TPS54360DDAR",
  "brief": "Texas Instruments DC-DC Converters, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "pmic",
    "tps54360ddar"
  ],
  "component": {
    "mpn": "TPS54360DDAR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-8-EP",
    "pin_count": 9,
    "category": "PMIC",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://www.ti.com/lit/ds/symlink/tps54360ddar.pdf",
    "parts": {
      "symbol": "tps54360ddar.kicad_sym",
      "footprint": "tps54360ddar.kicad_mod",
      "model_3d": "tps54360ddar-etched.glb",
      "model_3d_plain": "tps54360ddar.glb",
      "model_3d_step": "tps54360ddar-etched.step",
      "model_3d_step_plain": "tps54360ddar.step",
      "lbr": "tps54360ddar.lbr"
    },
    "distributor_links": {
      "digikey": "296-37676-2-ND",
      "lcsc": "C44377"
    },
    "pins": [
      {
        "number": "1",
        "name": "BOOT",
        "type": "power_out",
        "description": "Bootstrap capacitor node for the high-side MOSFET gate drive. A bootstrap capacitor is required between BOOT and SW; if the BOOT-SW voltage falls below the minimum required to drive the high-side MOSFET, the output is switched off until the capacitor is refreshed (BOOT-SW absolute max 8 V)."
      },
      {
        "number": "2",
        "name": "VIN",
        "type": "power_in",
        "description": "Input supply voltage. Operating range 4.5 V to 60 V (absolute max 65 V). Decouple with a low-ESR ceramic capacitor close to the pin."
      },
      {
        "number": "3",
        "name": "EN",
        "type": "input",
        "description": "Enable input with internal pull-up current source (~1.2 µA typ). Pull below 1.2 V to disable, float to enable. Two external resistors can program the input UVLO threshold and hysteresis. Absolute max 8.4 V."
      },
      {
        "number": "4",
        "name": "RT/CLK",
        "type": "bidirectional",
        "description": "Resistor timing / external clock input. In RT mode an internal amplifier holds this pin at a fixed voltage and an external resistor to GND sets fSW (100 kHz-2.5 MHz). When pulled above the PLL upper threshold (~2 V), the pin switches to CLK mode as a synchronization input to the internal PLL; if clocking stops, the device returns to RT mode."
      },
      {
        "number": "5",
        "name": "FB",
        "type": "input",
        "description": "Inverting input of the transconductance (gm) error amplifier. Regulated to the internal 0.8 V (±1%) reference by an external resistor divider from VOUT."
      },
      {
        "number": "6",
        "name": "COMP",
        "type": "output",
        "description": "Error amplifier output and input to the output switch current (PWM) comparator. Connect the frequency compensation network (R+C, plus optional pole cap) to this pin."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground return. Must be tied to the exposed thermal pad on the PCB for proper operation."
      },
      {
        "number": "8",
        "name": "SW",
        "type": "power_out",
        "description": "Switching node: source of the internal high-side power MOSFET. Connects to the external inductor and to the low-side catch diode/BOOT capacitor return. Absolute max −0.6 V to 65 V (−2 V for 10 ns transients)."
      },
      {
        "number": "9",
        "name": "Thermal Pad",
        "type": "passive",
        "description": "Exposed thermal PowerPAD on the underside of the HSOIC package. Must be electrically connected to GND on the PCB and to a copper thermal plane for proper thermal and electrical operation."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/tps54360ddar.pdf",
        "pages": 45,
        "sha256": "8c7b9eff00b5293a",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 9,
        "described": 9,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.78,
        -1.905
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "TI_SO-PowerPAD-8@sha256:251b438f7e2e0404",
      "mark": "drawn"
    },
    "models_3d": [
      {
        "file": "tps54360ddar.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.4,
          4.9,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "53b055ee4d166c0b9de551669cc1294f95b96baacbfe26d9316b576c1ce29fbf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tps54360ddar-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.4,
          4.9,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "dc7d5434d4ef1e57677ff56775de63cc57df1ed7026347d3db82ff50c72da40f",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-8-EP",
      "Category": "PMIC",
      "Pins": "9"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "tps54360ddar"
  ],
  "discovery_pitch": "TPS54360DDAR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "tps54360ddar.kicad_sym",
    "tps54360ddar.kicad_mod",
    "tps54360ddar.glb",
    "tps54360ddar.step",
    "tps54360ddar-etched.step",
    "tps54360ddar.lbr",
    "docs/hero.png",
    "docs/tps54360ddar-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "variants": [
    {
      "mpn": "TPS54360DDAR",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T12:11:29.305Z"
}