component
TPS54360
Public Made by Adomby adom
TI 60 V, 3.5 A synchronous-rectified step-down converter, HSOP-8 PowerPAD. Wide input, integrated FET. Datasheet-verified.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS54360
Texas Instruments · Switching regulator (buck) · HSOP-8 (PowerPAD)
Steps a wide 4.5 to 60 V input down to a regulated rail at up to 3.5 A, with the high-side MOSFET integrated so the external parts are an inductor, a diode, and a few capacitors. A resistor at RT/CLK sets or synchronizes the switching frequency, EN gives an adjustable enable threshold, and the compensation is external at COMP for a wide range of outputs. The 60 V ceiling suits it to automotive, industrial 48 V, and unregulated-supply rails. The PowerPAD carries heat into the board.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | Bootstrap capacitor node for the high-side MOSFET gate driver. A ceramic capacitor (typically 0.1 µF) is required between BOOT and SW. If VBOOT-VSW falls below the UVLO threshold, switching is halted until the bootstrap capacitor is refreshed. |
| 2 | VIN | power_in | Input supply voltage. Operating range 4.5 V to 60 V (65 V absolute max). Bypass locally with a low-ESR ceramic capacitor to GND. |
| 3 | EN | input | Enable input with internal pull-up current source. Pull below ~1.2 V to disable the converter, float to enable. Programmable UVLO can be set with an external resistor divider from VIN. Absolute max 8.4 V. |
| 4 | RT/CLK | bidirectional | Resistor Timing and External Clock input. Connect a resistor to GND to program the switching frequency (100 kHz to 2.5 MHz). Alternatively, drive with an external clock (above the PLL upper threshold) to synchronize the internal oscillator; upon loss of clock, the device reverts to resistor-programmed frequency. |
| 5 | FB | input | Inverting input of the transconductance (gm) error amplifier. Connect to the output through a resistor divider to program VOUT relative to the internal 0.8 V reference. |
| 6 | COMP | output | Error amplifier output and input to the output switch current (PWM) comparator. Connect the loop-compensation network (typically series R+C with an optional parallel C) between COMP and GND. |
| 7 | GND | power_in | Device ground return. Must be electrically tied to the exposed thermal PowerPAD on the PCB for proper operation. |
| 8 | SW | power_out | Switch node - source of the internal high-side power MOSFET and switching node of the buck converter. Connects to the output inductor and the cathode of the external catch (Schottky) diode. Rated −0.6 V to 65 V (−2 V for 10-ns transients). |
| 9 | Thermal Pad | power_in | Exposed thermal PowerPAD on the package underside. Must be electrically connected to the GND pin/plane on the PCB for proper operation and to conduct heat out of the device. |
Key specifications
| Parameter | Value |
|---|---|
| Type | Step-down (buck) converter |
| Input | 4.5-60 V |
| Output current | 3.5 A |
| Integrated FET | High-side (asynchronous) |
| Switching freq | Adjustable / sync (RT/CLK) |
| Features | Adjustable EN, external compensation |
| Package | HSOP-8 (PowerPAD) |
Ordering variants
Same part, different packaging or reel option.
TPS54360DDA (HSOP-8)TPS54360BDDA (improved, HSOP-8)
CAD (KiCad official)
- Symbol:
Regulator_Switching:TPS54360DDA (KiCad official) - Footprint:
Package_SO:TI_SO-PowerPAD-8_ThermalVias - 3D model: HSOP-8 PowerPAD (KiCad packages3D, STEP)
- 3D model files:
tps54360-etched.step/tps54360-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps54360.step/tps54360.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (50 pp, sha256
c2743e51e9f180e3, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).