# TPS54336ADDAR

**Texas Instruments** · DC-DC Converters · HSOP-8-EP

TPS54336ADDAR from Texas Instruments, in a HSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | A bootstrap capacitor is required between BOOT and PH; if its voltage falls below the minimum required by the output device, the output is forced off until the capacitor is refreshed (BOOT-PH max 7.5 V). |
| 2 | VIN | power_in | 4.5- to 28-V input supply voltage (absolute maximum 30 V). |
| 3 | PH | output | Source of the internal high-side power MOSFET (switching node). |
| 4 | GND | power_in | Ground. |
| 5 | VSENSE | input | Inverting node of the transconductance (gm) error amplifier. |
| 6 | COMP | output | Error-amplifier output and input to the output switch-current comparator; connect frequency compensation components to this pin. |
| 7 | EN | input | Enable pin; float the EN pin to enable (absolute maximum 6 V). |
| 8 | SS | passive | Soft-start and tracking pin; an external capacitor sets the internal voltage-reference rise time, and the voltage on this pin overrides the internal reference. |
| 9 | PowerPAD | power_in | Exposed thermal pad; connect the GND pin to it and tie it to the internal PCB ground plane using multiple thermal vias for good thermal performance. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HSOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply input voltage | VSS | 4.5 |  | 28 | V |  | 4 |
| Output voltage | VOUT | 0.8 |  | 24 | V |  | 4 |
| Output current | IOUT | 0 |  | 3 | A |  | 4 |
| Operating junction temperature | TJ | -40 |  | 150 | °C |  | 4 |
| Input voltage | VIN | -0.3 |  | 30 | V |  | 4 |
| EN pin voltage | EN | -0.3 |  | 6 | V |  | 4 |
| BOOT pin voltage | BOOT | -0.3 |  |  | V | Maximum printed as (VPH + 7.5) | 4 |
| VSENSE pin voltage | VSENSE | -0.3 |  | 3 | V |  | 4 |
| COMP pin voltage | COMP | -0.3 |  | 3 | V |  | 4 |
| SS pin voltage | SS | -0.3 |  | 3 | V |  | 4 |
| BOOT-PH voltage | BOOT-PH | 0 |  | 7.5 | V |  | 4 |
| PH pin voltage | PH | -1 |  | 30 | V |  | 4 |
| PH pin voltage, 10-ns transient | PH | -3.5 |  | 30 | V | 10-ns transient | 4 |
| VDIFF (GND to exposed thermal pad) | VDIFF | -0.2 |  | 0.2 | V | GND to exposed thermal pad | 4 |
| Operating junction temperature | TJ | -40 |  | 150 | °C |  | 4 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 4 |
| Operating input voltage |  | 4.5 |  | 28 | V |  | 5 |
| Input UVLO threshold |  |  | 4 | 4.5 | V | Rising VIN | 5 |
| Input UVLO hysteresis |  |  | 180 | 400 | mV |  | 5 |
| VIN-shutdown supply current |  |  | 2 | 10 | µA | VEN = 0 V | 5 |
| VIN-operating non-switching supply current |  |  | 310 | 800 | µA | VVSENSE = 810 mV | 5 |
| Enable threshold, rising |  |  | 1.21 | 1.28 | V | Rising | 5 |
| Enable threshold, falling |  |  | 1.1 | 1.17 | V | Falling | 5 |
| Voltage reference |  | 0.7936 | 0.8 | 0.8064 | V | TJ = 25°C | 5 |
| Voltage reference |  | 0.788 | 0.8 | 0.812 | V |  | 5 |
| High-side switch resistance |  |  | 160 | 280 | mΩ | V(BOOT-PH) = 3 V | 5 |
| High-side switch resistance |  |  | 128 | 230 | mΩ | V(BOOT-PH) = 6 V | 5 |
| Low-side switch resistance |  |  | 84 | 170 | mΩ | VIN = 12 V | 5 |
| High-side switch current-limit threshold |  | 4 | 4.9 | 6.5 | A |  | 5 |
| Low-side switch sourcing current-limit |  | 3.5 | 4.7 | 6.1 | A |  | 5 |
| Thermal shutdown |  | 160 |  | 175 | °C |  | 6 |
| Minimum on time |  |  | 94 | 145 | ns | Measured at 90% to 90% of VIN, IPH = 2 A | 6 |
| Internal switching frequency, TPS54336A |  | 272 | 340 | 408 | kHz |  | 6 |
| Junction-to-ambient thermal resistance (DDA, SO PowerPAD 8-pin) | RθJA |  | 42.1 |  | °C/W |  | 5 |
| Junction-to-case (top) thermal resistance (DDA, SO PowerPAD 8-pin) | RθJC(top) |  | 50.9 |  | °C/W |  | 5 |
| Junction-to-board thermal resistance (DDA, SO PowerPAD 8-pin) | RθJB |  | 31.8 |  | °C/W |  | 5 |
| Junction-to-board characterization parameter (DDA, SO PowerPAD 8-pin) | ψJB |  | 13.5 |  | °C/W |  | 5 |
| Junction-to-case (bottom) thermal resistance (DDA, SO PowerPAD 8-pin) | RθJC(bot) |  | 7.1 |  | °C/W |  | 5 |

## CAD (KiCad official)

- Symbol: `TPS54336ADDAR`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`
- 3D model: HSOP-8-EP (KiCad packages3D, STEP)
- 3D model files: `tps54336addar-etched.step` / `tps54336addar-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps54336addar.step` / `tps54336addar.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps54336a) (55 pp, sha256 `7a254e93f5247ff1`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps54336addar-datasheet.pdf)