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Contents

README

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TPS54334DDAR

Texas Instruments · DC-DC Converters · SO-8

TPS54334DDAR from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT output Bootstrap capacitor node for the high-side MOSFET gate driver. A bootstrap capacitor is required between BOOT and SW; if the voltage on this capacitor falls below the minimum required by the driver, the output is forced to switch off until the capacitor is refreshed.
2 VIN power_in Input supply voltage, 4.2 V to 28 V. Bypass locally to GND with low-ESR ceramic capacitors (e.g., 10 µF).
3 SW output Switching node - source of the internal high-side power MOSFET and drain of the internal low-side MOSFET. Connects to the external inductor. Absolute range −1 V to 30 V (−3.5 V for 10 ns transients).
4 GND power_in Device ground. Must be connected to the exposed PowerPAD for proper operation; tie the PowerPAD to the internal PCB ground plane with multiple vias for good thermal performance.
5 VSENSE input Inverting input of the internal gm error amplifier. Connect the output-voltage feedback divider to this pin; regulated to the 0.8 V internal reference (±1.5%).
6 COMP output Error-amplifier output and input to the output-switch current comparator. Connect the loop frequency-compensation network (R-C) here. Transconductance ≈ 1300 µmhos; COMP-to-Iswitch gm ≈ 8 A/V.
7 EN input Enable pin. Float to enable (internal pull-up); pull low to disable and enter shutdown (~2 µA typ). Rising threshold ≈ 1.21 V, falling ≈ 1.17 V; absolute max 6 V.
8 PGOOD output Power-good open-drain output. Requires an external pull-up resistor (~100 kΩ) to a suitable supply (≤ 6 V absolute max). Asserts low when the output voltage is out of regulation.
PAD PowerPAD power_in Exposed thermal pad on the package bottom. Must be electrically connected to GND (pin 4) and thermally coupled to the PCB ground plane through multiple vias for proper operation and heat dissipation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SO-8
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • TPS54334DDAR
  • TPS54334DDARDRC
  • TPS54334DDARDRCR
  • TPS54334DDARDRCT

CAD (KiCad official)

  • Symbol: TPS54334DDAR
  • Footprint: Package_SO:TI_SO-PowerPAD-8
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: tps54334ddar-etched.step / tps54334ddar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54334ddar.step / tps54334ddar.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps54334ddar.step 123 KB You want the bare part, or you mark your own boards.
tps54334ddar-etched.step 2.5 MB You want the part with TPS54334DDAR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 618 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 6e682f420e8a5cdf, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF