component
TPS54332DDAR
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Texas Instruments DC-DC Converters, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownTPS54332DDAR
Texas Instruments · DC-DC Converters · SOP-8-EP
TPS54332DDAR from Texas Instruments, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | Bootstrap capacitor node for the high-side MOSFET gate driver. A 0.1-µF capacitor is required between BOOT and PH; if the voltage on this capacitor falls below the minimum requirement, the high-side MOSFET is forced to switch off until the capacitor is refreshed. Abs-max BOOT-PH = 8 V. |
| 2 | VIN | power_in | Input supply voltage, 3.5 V to 28 V. Connect input decoupling capacitors close to this pin. |
| 3 | EN | input | Enable pin. Pull below 1.25 V to disable; float to enable. A two-resistor divider on this pin programs the input undervoltage lockout threshold. Abs-max 6 V. |
| 4 | SS | input | Slow-start pin. An external capacitor connected from this pin to GND sets the output voltage rise time and limits inrush current at startup. |
| 5 | VSENSE | input | Inverting input of the gm error amplifier. Connect a resistor divider from VOUT to this pin to program the output voltage (internal reference 0.8 V). |
| 6 | COMP | output | Error amplifier output and input to the PWM comparator. Connect the loop frequency compensation network (typically a series R-C to GND) to this pin. |
| 7 | GND | power_in | Device ground. Must be connected to the exposed PowerPAD (pin 9) for proper operation. |
| 8 | PH | output | Switch node - source of the internal high-side power MOSFET. Connect to the output inductor and the cathode of the external catch diode. Rated for up to 9.25 A source/sink current. |
| 9 | PowerPAD | power_in | Exposed thermal pad on the underside of the package. Must be soldered to the PCB ground plane and connected to the GND pin (pin 7) for proper electrical operation and heat dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOP-8-EP |
| Category | PMIC |
| Pins | 9 |
Ordering variants
Same part, different packaging or reel option.
TPS54332DDAR
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage (VIN pin) | VIN | -0.3 | 30 | V | 4 | ||
| EN pin input voltage | EN | -0.3 | 6 | V | 4 | ||
| BOOT pin voltage | BOOT | 38 | V | 4 | |||
| VSENSE pin voltage | VSENSE | -0.3 | 3 | V | 4 | ||
| COMP pin voltage | COMP | -0.3 | 3 | V | 4 | ||
| SS pin voltage | SS | -0.3 | 3 | V | 4 | ||
| BOOT-PH voltage | BOOT-PH | 8 | V | 4 | |||
| PH pin voltage | PH | -0.6 | 30 | V | 4 | ||
| PH negative transient | PH | -5 | V | 10 ns transient from ground to negative peak | 4 | ||
| Source current EN | EN | 100 | μA | 4 | |||
| Source current BOOT | BOOT | 100 | mA | 4 | |||
| Source current VSENSE | VSENSE | 10 | μA | 4 | |||
| Source current PH | PH | 9.25 | A | 4 | |||
| Sink current VIN | VIN | 9.25 | A | 4 | |||
| Sink current COMP | COMP | 100 | μA | 4 | |||
| Sink current SS | SS | 200 | 4 | ||||
| Operating junction temperature (absolute maximum) | TJ | -40 | 150 | °C | 4 | ||
| Operating input voltage on VIN pin | VIN | 3.5 | 28 | V | 4 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Shutdown supply current | 1 | 4 | μA | EN = 0 V, VIN = 12 V, –40°C to 85°C | 6 | ||
| Operating non-switching supply current | 82 | 120 | μA | VSENSE = 0.85 V | 6 | ||
| Enable threshold | 1.25 | 1.35 | V | Rising and Falling | 6 | ||
| Voltage reference | 0.772 | 0.8 | 0.828 | V | 6 | ||
| High-side MOSFET on resistance | 115 | 200 | mΩ | BOOT-PH = 3 V, VIN = 3.5 V | 6 | ||
| High-side MOSFET on resistance | 80 | 150 | mΩ | BOOT-PH = 6 V, VIN = 12 V | 6 | ||
| Error amplifier source/sink current | -7 | 7 | μA | V(COMP) = 1.0 V, 100-mV overdrive | 6 | ||
| Current limit threshold | 4.2 | 6.5 | A | VIN = 12 V | 6 | ||
| Switching frequency | 800 | 1000 | 1200 | kHz | VIN = 12 V, 25°C | 6 | |
| Minimum controllable on time | 110 | 135 | ns | VIN = 12 V, 25°C | 6 | ||
| Maximum controllable duty ratio | 90 | 93 | % | BOOT-PH = 6 V | 6 | ||
| Error amplifier transconductance (gm) | gm | 92 | μmhos | –2 μA < ICOMP < 2 μA, V(COMP) = 1 V | 6 | ||
| Error amplifier DC gain | 800 | V/V | VSENSE = 0.8 V | 6 | |||
| Error amplifier unity gain bandwidth | 2.7 | MHz | 5 pF capacitance from COMP to GND pins | 6 | |||
| Switch current to COMP transconductance | 12 | A/V | VIN = 12 V | 6 | |||
| Pulse-skipping Eco-Mode switch current threshold | 160 | mA | 6 | ||||
| Thermal shutdown | 165 | °C | 6 | ||||
| SS charge current | 2 | μA | V(SS) = 0.4 V | 6 | |||
| SS to VSENSE matching | 10 | mV | V(SS) = 0.4 V | 6 | |||
| Input current at enable threshold – 50 mV | -1 | μA | Enable threshold – 50 mV | 6 | |||
| Input current at enable threshold + 50 mV | -4 | μA | Enable threshold + 50 mV | 6 | |||
| Junction-to-ambient thermal resistance | RθJA | 48.7 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 52.4 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 25.3 | °C/W | 5 | |||
| Junction-to-top characterization parameter | ψJT | 8.4 | °C/W | 5 | |||
| Junction-to-board characterization parameter | ψJB | 25.2 | °C/W | 5 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 2.3 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
TPS54332DDAR - Footprint:
Package_SO:TI_SO-PowerPAD-8 - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
tps54332ddar-etched.step/tps54332ddar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps54332ddar.step/tps54332ddar.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tps54332ddar.step |
123 KB | You want the bare part, or you mark your own boards. |
tps54332ddar-etched.step |
2.6 MB | You want the part with TPS54332DDAR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 631 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
b2d295562b641a08, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).