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TPS54319RTER

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs tps54319rter: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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README.md Initial commit: component/tps54319rter · Ray 4d ago
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tps54319rter-etched.glb tps54319rter: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps54319rter-etched.step tps54319rter: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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TPS54319RTER

Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)

TPS54319RTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input supply voltage, 2.95 V to 6 V.
2 VIN power_in Input supply voltage, 2.95 V to 6 V.
3 GND power_in Power Ground connected directly to the power pad under the IC.
4 GND power_in Power Ground connected directly to the power pad under the IC.
5 AGND power_in Analog Ground that should be electrically connected to GND close to the device.
6 VSENSE input Inverting node of the transconductance (gm) error amplifier.
7 COMP output Error amplifier output and input to the output switch current comparator for frequency compensation.
8 RT/CLK input Resistor Timing or External Clock input pin.
9 SS/TR input Slow start and tracking input with external capacitor setting output voltage rise time.
10 PH power_out Source of the internal high side power MOSFET and drain of the internal low side synchronous rectifier MOSFET.
11 PH power_out Source of the internal high side power MOSFET and drain of the internal low side synchronous rectifier MOSFET.
12 PH power_out Source of the internal high side power MOSFET and drain of the internal low side synchronous rectifier MOSFET.
13 BOOT power_in Bootstrap supply; requires capacitor between BOOT and PH, output forced off if voltage below minimum BOOT UVLO.
14 PWRGD output Open drain output; asserts low if output voltage low due to thermal shutdown, overcurrent, over/under-voltage, or EN shutdown.
15 EN input Enable pin with internal pull-up; pull below 1.2 V to disable, float to enable, or use two resistors to set UVLO threshold.
16 VIN power_in Input supply voltage, 2.95 V to 6 V.
17 PowerPAD power_in Exposed power pad connected to GND and internal PCB ground plane using multiple vias for thermal performance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS54319RTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps54319rter-etched.step / tps54319rter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54319rter.step / tps54319rter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 9398b65d5f016726, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF