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TPS54316MPWPREP

Public Made by Adom

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Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS54316MPWPREP

Texas Instruments · DC-DC Converters · HTSSOP-20-EP

TPS54316MPWPREP from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AGND power_in Analog ground and return for the compensation network, output divider, slow-start capacitor, VBIAS capacitor, RT resistor and FSEL pin; the PowerPAD must be connected to AGND.
2 VSENSE input Error amplifier inverting input that connects directly to the output voltage sense point.
3 NC unconnected No internal connection.
4 PWRGD output Open-drain power good output that is high impedance when VSENSE is at or above 90% of Vref and is otherwise low, including when SS/ENA is low or internal shutdown is active.
5 BOOT passive Bootstrap input; a 0.022-µF to 0.1-µF low-ESR capacitor connected from BOOT to PH generates the floating drive for the high-side FET driver.
6 PH bidirectional Phase input/output at the junction of the internal high- and low-side power MOSFETs and the output inductor.
7 PH bidirectional Phase input/output at the junction of the internal high- and low-side power MOSFETs and the output inductor.
8 PH bidirectional Phase input/output at the junction of the internal high- and low-side power MOSFETs and the output inductor.
9 PH bidirectional Phase input/output at the junction of the internal high- and low-side power MOSFETs and the output inductor.
10 PH bidirectional Phase input/output at the junction of the internal high- and low-side power MOSFETs and the output inductor.
11 PGND power_in Power ground and high-current return for the low-side driver and power MOSFET; connect with large copper areas to the input and output supply returns and capacitor negative terminals.
12 PGND power_in Power ground and high-current return for the low-side driver and power MOSFET; connect with large copper areas to the input and output supply returns and capacitor negative terminals.
13 PGND power_in Power ground and high-current return for the low-side driver and power MOSFET; connect with large copper areas to the input and output supply returns and capacitor negative terminals.
14 VIN power_in Input supply for the power MOSFET switches and internal bias regulator; bypass to PGND close to the package with a 1-µF to 10-µF low-ESR ceramic capacitor.
15 VIN power_in Input supply for the power MOSFET switches and internal bias regulator; bypass to PGND close to the package with a 1-µF to 10-µF low-ESR ceramic capacitor.
16 VIN power_in Input supply for the power MOSFET switches and internal bias regulator; bypass to PGND close to the package with a 1-µF to 10-µF low-ESR ceramic capacitor.
17 VBIAS power_out Internal bias regulator output supplying internal circuitry; bypass to AGND with a high-quality, low-ESR 0.1-µF to 1-µF ceramic capacitor.
18 SS/ENA bidirectional Dual-function slow-start/enable pin that provides the logic input to enable or disable operation and the capacitor input that sets the start-up time.
19 FSEL input Frequency select logic input that selects between two internally set switching frequencies.
20 RT input Frequency setting resistor input; connect a resistor from RT to AGND to set the switching frequency fs.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20-EP
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: TPS54316MPWPREP
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps54316mpwprep-etched.step / tps54316mpwprep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54316mpwprep.step / tps54316mpwprep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 33d2837b152fe8e7, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF