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Initial commit: component/tps54225pwpr

Ray ·7aa6ec1100 ·1mo ago
2 files changed +237
README.mdadded+51
@@ -0,0 +1,51 @@+# TPS54225PWPR++**Texas Instruments** · DC-DC Converters · HTSSOP-14++TPS54225PWPR from Texas Instruments, in a HTSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VO | input | Connect to output of converter; this pin is used for On-Time Adjustment. |+| 2 | VFB | input | Converter feedback input; connect with feedback resistor divider. |+| 3 | VREG5 | power_out | 5.5 V internal power supply output; a capacitor (typical 1 uF) should be connected to GND. |+| 4 | SS | passive | Soft-start control pin; an external capacitor should be connected to GND to set the slow-start time. |+| 5 | GND | power_in | Signal ground pin. |+| 6 | PG | output | Open drain power good output. |+| 7 | EN | input | Enable control input. |+| 8 | PGND1 | power_in | Ground return for low-side MOSFET; also serves as input of a current comparator, and should be connected strongly together with PGND near the IC. |+| 9 | PGND2 | power_in | Ground return for low-side MOSFET; also serves as input of a current comparator, and should be connected strongly together with PGND near the IC. |+| 10 | SW1 | output | Switch node connection between high-side NFET and low-side NFET; also serves as an input to a current comparator. |+| 11 | SW2 | output | Switch node connection between high-side NFET and low-side NFET; also serves as an input to a current comparator. |+| 12 | VBST | power_in | Supply input for the high-side NFET gate driver (boost terminal); a capacitor should be connected from this pin to the respective SW1, SW2 terminals, and an internal PN diode connects VREG5 to this pin. |+| 13 | VIN | power_in | Power input, connected to the high-side NFET drain. |+| 14 | VCC | power_in | Supply input for the 5 V internal linear regulator that powers the control circuitry. |+| 15 | PowerPAD | power_in | Thermal pad of the package (back side); must be soldered to achieve appropriate dissipation and should be connected to PGND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-14 |+| Category | Power Management (PMIC) |+| Pins | 15 |++## CAD (KiCad official)++- Symbol: `TPS54225PWPR`+- Footprint: `Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-14 (KiCad packages3D, STEP)+- 3D model files: `tps54225pwpr-etched.step` / `tps54225pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps54225pwpr.step` / `tps54225pwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps54225) (29 pp, sha256 `3c3ac317d4ab1b65`, retrieved 2026-09-24, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps54225pwpr-datasheet.pdf)
page.jsonadded+186
@@ -0,0 +1,186 @@+{+  "slug": "tps54225pwpr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, HTSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps54225pwpr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps54225pwpr.kicad_sym",+    "tps54225pwpr.kicad_mod",+    "tps54225pwpr.glb",+    "tps54225pwpr.step",+    "tps54225pwpr.lbr",+    "docs/hero.png",+    "docs/tps54225pwpr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "TPS54225PWPR",+    "manufacturer": "Texas Instruments",+    "package": "HTSSOP-14",+    "pin_count": 15,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps54225",+    "parts": {+      "symbol": "tps54225pwpr.kicad_sym",+      "footprint": "tps54225pwpr.kicad_mod",+      "model_3d": "tps54225pwpr-etched.glb",+      "model_3d_plain": "tps54225pwpr.glb",+      "model_3d_step": "tps54225pwpr-etched.step",+      "model_3d_step_plain": "tps54225pwpr.step",+      "lbr": "tps54225pwpr.lbr"+    },+    "distributor_links": {+      "lcsc": "C555460"+    },+    "pins": [+      {+        "number": "1",+        "name": "VO",+        "type": "input",+        "description": "Connect to output of converter; this pin is used for On-Time Adjustment."+      },+      {+        "number": "2",+        "name": "VFB",+        "type": "input",+        "description": "Converter feedback input; connect with feedback resistor divider."+      },+      {+        "number": "3",+        "name": "VREG5",+        "type": "power_out",+        "description": "5.5 V internal power supply output; a capacitor (typical 1 uF) should be connected to GND."+      },+      {+        "number": "4",+        "name": "SS",+        "type": "passive",+        "description": "Soft-start control pin; an external capacitor should be connected to GND to set the slow-start time."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Signal ground pin."+      },+      {+        "number": "6",+        "name": "PG",+        "type": "output",+        "description": "Open drain power good output."+      },+      {+        "number": "7",+        "name": "EN",+        "type": "input",+        "description": "Enable control input."+      },+      {+        "number": "8",+        "name": "PGND1",+        "type": "power_in",+        "description": "Ground return for low-side MOSFET; also serves as input of a current comparator, and should be connected strongly together with PGND near the IC."+      },+      {+        "number": "9",+        "name": "PGND2",+        "type": "power_in",+        "description": "Ground return for low-side MOSFET; also serves as input of a current comparator, and should be connected strongly together with PGND near the IC."+      },+      {+        "number": "10",+        "name": "SW1",+        "type": "output",+        "description": "Switch node connection between high-side NFET and low-side NFET; also serves as an input to a current comparator."+      },+      {+        "number": "11",+        "name": "SW2",+        "type": "output",+        "description": "Switch node connection between high-side NFET and low-side NFET; also serves as an input to a current comparator."+      },+      {+        "number": "12",+        "name": "VBST",+        "type": "power_in",+        "description": "Supply input for the high-side NFET gate driver (boost terminal); a capacitor should be connected from this pin to the respective SW1, SW2 terminals, and an internal PN diode connects VREG5 to this pin."+      },+      {+        "number": "13",+        "name": "VIN",+        "type": "power_in",+        "description": "Power input, connected to the high-side NFET drain."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply input for the 5 V internal linear regulator that powers the control circuitry."+      },+      {+        "number": "15",+        "name": "PowerPAD",+        "type": "power_in",+        "description": "Thermal pad of the package (back side); must be soldered to achieve appropriate dissipation and should be connected to PGND."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Pins 8-11 described as pairs in PIN FUNCTIONS table: pin names for 8-9 (PGND1, PGND2) are inferred f",+          "exposed pad 15 added from the footprint"+        ],+        "pages_sent": 29,+        "cost_usd": 0.3218,+        "at": "2026-09-24T06:27:30"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps54225",+        "pages": 29,+        "sha256": "3c3ac317d4ab1b65",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 15,+        "described": 15,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file